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Unformatted text preview: Name Computer Architecture EE 4720 Midterm Examination Friday, 26 October 2001, 13:40–14:30 CDT Alias Problem 1 (15 pts) Problem 2 (15 pts) Problem 3 (10 pts) Problem 4 (60 pts) Exam Total (100 pts) Good Luck! Problem 1: The DLX implementation below lacks bypass paths and, worse than that, lacks the hardware needed for control-transfer instructions. sign ext. IR Addr 6:10 11:15 IR IF ID EX WB MEM IR IR A B IMM NPC ALU =0 Addr Data Addr D In +4 PC Mem Port Addr Data Addr In Mem Out B ALU MD Data NPC Decode RD RD RD RD [5 pts] Add exactly the hardware needed so that the control-transfer instructions execute as shown below. Include a connection to the =0 box used in determining whether a branch is taken. [5 pts] Add exactly those bypass paths necessary so that the code below executes as shown . Check the code carefully for dependencies, including all those related to the jalr instruction. [5 pts] Show the cycles in which each added wire will be used....
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