Midterm Examination 2006

Midterm Examination 2006 - Name Computer Architecture EE...

Info iconThis preview shows pages 1–3. Sign up to view the full content.

View Full Document Right Arrow Icon

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: Name Computer Architecture EE 4720 Midterm Examination Friday, 27 October 2006, 12:4013:30 CDT Alias Problem 1 (50 pts) Problem 2 (20 pts) Problem 3 (30 pts) Exam Total (100 pts) Good Luck! Problem 1: In the MIPS implementation below the data memory port is in an unusual position that avoids a stall and allows the implementation of a new (to MIPS but not CISC ISAs) instruction . Some wires are labeled with cycle numbers and values that will then be present. For example, C1:10 indicates that at cycle 1 the wire will hold a 10. Other wires are labeled just with cycle numbers, indicating that the wire is used at that cycle. If a value on any labeled wire is changed the code would execute incorrectly. [50 pts] Write a program consistent with these labels. All register numbers and immediate values can be determined. Identify the new (to MIPS) instruction and describe what it does. format immed IR Addr 25:21 20:16 IF ID EX WB ME rsv rtv IMM NPC ALU Addr Data Data Addr D In +1 PC Mem Port...
View Full Document

Page1 / 5

Midterm Examination 2006 - Name Computer Architecture EE...

This preview shows document pages 1 - 3. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online