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Unformatted text preview: LSU EE 4720 Statically Sched. MIPS Impl. Study Guide Spring 2006 David M. Koppelman 1.1 Introduction An important part of the course and a big chunk of midterm- and final-exam credit is on the statically scheduled MIPS implementations. Essentially two kinds of questions are asked about these: How will it run this program? and How can it be modified to execute this new instruction? This study guide lists questions of each type to study, along with hints on how to solve them. The questions are grouped by type, from easiest type to hardest type. Once problems in one group becomes easy (or at least doable) move on to the next group. 1.1.1 General Study Hints In the hardware diagrams, such as the one illustrated below, every wire has a purpose. Before attempting the problems below look over the diagram and if necessary find out the purpose of any wires you are not familiar with. The same holds for logic, such as the ALU, format immediate unit, etc. You should be able to determine what value will be on a wire at each cycle when a given program runs (see the PED and Values problems ) and you should be able to write a program that will set the wire to a particular value at a particular cycle (see the Write a program consistent . . . problems). The following have been difficult for some: • Stores ( sb, sh, sw : those stores). Understand that the value being stored goes through the rtv latch between EX and MEM. • Branch conditions. The comparison units for branches are not often shown, but they do read registers and so are the cause of stalls. They are usually in the ID stage....
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This note was uploaded on 08/01/2009 for the course EE 4720 taught by Professor Staff during the Spring '08 term at LSU.
- Spring '08