Section 3. f01

Section 3. f01 - 09-1 09-1 MulticyclePipelineOperations

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Unformatted text preview: 09-1 09-1 MulticyclePipelineOperations Materialmaybeaddedtothisset. MaterialCovered Section3.7. Long-LatencyOperations(Topics) Typicallong-latencyinstructions:floatingpoint Pipelinedv.non-pipelinedexecutionunits Initiationintervalandlatency PlacementinChapter-3DLXpipeline Timingdiagrams 09-1 EE4720LectureTransparency.Formatted10:36,24October2001fromlsli09. 09-1 09-2 09-2 Long-LatencyInstructions(Operations) CommonLong-LatencyInstructions Fastest(shortestbutstilllonglatency):Floating-PointAdd,Subtract,Conversions DLX: addf , addd , cvti2f (convertintegertofloat), ltd (compareless-thanofdoubles),etc. IntermediateSpeed:Multiply DLX: multd , multf . SlowestSpeed:Divide,Modulo,SquareRoot DLX: divd , divf . 09-2 EE4720LectureTransparency.Formatted10:36,24October2001fromlsli09. 09-2 09-3 09-3 ImplementationofLong-LatencyInstructions Implementationbalancescostandperformance. LowCost:Unpipelined,SingleFunctionalUnit,DataRecirculates Wholefunctionalunitoccupiedbyinstructionduringcomputation ... ... soitcanexecuteonlyoneinstructionatatime. IntermediateCost:MultipleUnpipelinedFunctionalUnits Functionalunitsoccupiedbyinstructionduringcomputation ... ... eachcanexecuteadifferentinstruction. Costamultipleofsingle-unitcost. HighestCost:PipelinedFunctionalUnit Functionalunitpipelined,atbesteachstagecanholdadifferentinstruction. Costdisadvantagedependsonhowunpipelinedunitsimplemented. 09-3 EE4720LectureTransparency.Formatted10:36,24October2001fromlsli09. 09-3 09-4 09-4 FloatingPointinChapter-3DLXImplementation FloatingPointFunctionalUnits FPAdd Fourstages,fullypipelined:Latency3,InitiationInterval1. UsedforFPAdd,FPSubtract,FPComparisons,etc. FPMultiply Sevenstages,fullypipelined:Latency6,InitiationInterval1. UsedforFPMultiplyandIntegerMultiply. FPDivide Twentyfivestages,unpipelined:Latency24,InitiationInterval24. 09-4 EE4720LectureTransparency.Formatted10:36,24October2001fromlsli09. 09-4 09-5 09-5 HazardsWithLong-LatencyInstructionsinChapter-3Pipeline StructuralHazards FunctionalUnitStructuralHazards Becauseaninstructioncanoccupyafunctionalunit( e.g. ,DIV)morethanonecycle ... ... afollowinginstructionneedingthatunitmaybestalled. (Occurswheninitiationintervalgreaterthanone.) RegisterWrite(MEMStage)StructuralHazards Becausedifferentunitshavedifferentlatencies ... ... instructionsthatstartedatdifferenttimescanfinishatthesametime ... ... onlyonecanwriteresults(unlessextraregisterfileportsadded). DataHazards RAWHazards Aswithintegeroperations,resultnotreadyintime. Withlong-latencyoperationsinstructionsmaywaitlonger. 09-5 EE4720LectureTransparency.Formatted10:36,24October2001fromlsli09. 09-5 09-6 09-6 WAWHazards Occurswhentwonearbyinstructionswritesameregister ... ... andsecondinstructionfinishesfirst. WARHazards CannotoccurinChapter-3pipelinebecauseinstructionsstartinorder. PreciseExceptions Aheadachebecauseaninstructioncanbereadytowrite ... ... longbeforeaprecedinginstructionraisesanexception. 09-6 EE4720LectureTransparency.Formatted10:36,24October2001fromlsli09. 09-6 09-7...
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Section 3. f01 - 09-1 09-1 MulticyclePipelineOperations

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