ASM_solns_part2 - Solutions Synchronous Digital State...

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1 Solutions – Synchronous Digital State Machine Design Complete Circuit Design Problems (5-7) In the recommended “top-down” procedure to solve these type of problems, the following steps need to be followed: 1. Understand problem thoroughly. Some common sense decisions may need to be made about anything that is left unsaid. 2. If a modular design is adopted, select architectural elements that suggest themselves naturally from problem description. These are general circuit elements. No attempt is made at this time to select specific part numbers or ICs. Indeed, it would defeat the top-down design process as your design may get constrained by the peculiarities of the specific IC’s and lock you into a suboptimal design. 3. Specify a flowchart for the main machine (controller) that will control chosen arch. elements, if any, to solve problem. 4. Translate to ASM chart, carefully verify its correctness and refine requirements of architectural elements (if any). 5. Choose the part numbers for arch. elements (if any) from data books. 6. Choose a method to realize the machine corresponding to ASM chart, and hook up this circuits to the arch. elements (if any). In the problem solutions below, we have not done every step as above, but leave it to you to fill in the blanks. Also, we have only realized the state generator using the MUX based method. You should try out other methods, too.
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2 5(a) CLR TC 2 CLK CLR_C2 mod-300 RING Ring Alarm RESET 10 sc Wait RESET 5 mins no yes yes no no yes yes no no yes Flow Chart CLR TC 1 CLK CLR_C1 mod-10 RING CLR_C1 RESET TC 1 RESET TC 2 0 1 1 0 0 1 0 ALARM CLR_C2 1 0 1 S0 S1 S2 CLR_C1 00 01 10 C 1 C 0 ASM Chart Architectural components C1 C0 S0 0 0 S1 0 1 S2 1 0 If machine goes to unused state 11, make sure to go to S 0 (min. risk design).
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This note was uploaded on 08/02/2009 for the course ECE EE2006 taught by Professor Dr.kassim during the Fall '07 term at National University of Singapore.

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ASM_solns_part2 - Solutions Synchronous Digital State...

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