Chapter6 - EE2006 Digital Design /S Ranganath VI....

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EE2006 Digital Design /S Ranganath VI - 1 VI. Synchronous Digital Circuit Design Clocked synchronous state machines ¾ State machine structures – Mealy and Moore types. Analysis of state machines. Algorithmic state machine (ASM) chart notation. Synthesis of state machines from ASM Chart ¾ Traditional ¾ PLD method ¾ Multiplexer method ¾ One-hot method. Practical Design Considerations (clock skew, input signal sync) Design examples – a few, diverse examples illustrating the top- down digital circuit design process. ¾ Modular design of state machines – examples.
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EE2006 Digital Design /S Ranganath VI - 2 Clocked synchronous state machines Meaning: ¾ Clocked synchronous: clock signal is directly connected to all components with clock inputs. ¾ State machine: a circuit with sequential (and combinational) circuit elements. Such state machines change state only “at” the active clock transition (ACT) or tick. State changes actually occur only after the clock tick due to propagation delays of T i+1 T i+2 T i+3 T i+4 T i+5 T i+6 T i+7 T i+8 T i+9 T i+10 T i 1 0 1 0 1 0 CLK t pHL t pLH t setup Q/Q + J K Machine enters state Q=0 in clock period T i+5 , t pd delay after clock edge. Machine is in state Q=0 for clock period T i+5 . State changes actually occur only after the clock tick due to propagation delays of devices.
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EE2006 Digital Design /S Ranganath VI - 3 State machine structure Two types: Mealy and Moore machines. Mealy machine ¾ State memory A set of n FFs which store the current state of the machine. Possible to have upto 2 n states. FFs can be J-K or D, but D FFs preferred because they are simpler (one input vs. 2 inputs for J-K FFs). ¾ Next state logic A combinational circuit which decides the next state of the machine based on current state and inputs. Next state = f ( inputs , current state ) ¾ Output logic The outputs depend on the current state as well as the inputs. outputs = g ( inputs , current state )
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EE2006 Digital Design /S Ranganath VI - 4 Moore machine ¾ Moore and Mealy machines differ only in the output logic; in Moore machines, the outputs are functions of the current state only. outputs = g ( current state ) Analysis of state machines
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EE2006 Digital Design /S Ranganath VI - 5 74'04 C1.H IN. BIT.H C0.H DQ 74'04 74'04 BUF. FULL.H 74'08 74'08 74'11 74'11 74'32 74'32 74'74 74'74 D1.H D0.H C0.H 74'04 74'139 74'04 74'00 74'00 74'32 A.L D.L C.L B.L REG. LD.H OUT. FLAG.H COUNT. EN.H Next state logic State memory Output logic CLK Need to figure out what this state machine does: ¾ How does it move from state to state in response to inputs. ¾ Inputs : IN.BIT, BUF.FULL; Outputs : REG.LD, OUT.FLAG, COUNT.EN; Current State Bits : C1, C0. ¾ How do the outputs depend on the current state and inputs (notice that this is a Mealy machine).
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This note was uploaded on 08/02/2009 for the course ECE EE2006 taught by Professor Dr.kassim during the Fall '07 term at National University of Singapore.

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Chapter6 - EE2006 Digital Design /S Ranganath VI....

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