10520ds - DRC-10520 Make sure the next Card you purchase...

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Unformatted text preview: DRC-10520 Make sure the next Card you purchase has... HIGH POWER 16-BIT DIGITAL-TORESOLVER (D/R) CONVERTERS FEATURES 2 VA Drive Capacity 8-Bit/2-Byte Double Buffered Transparent Latch Resolution: 16 Bits Accuracy: to 1 Minute Power Amplifier Uses AC Reference or DC Supplies BIT Output DESCRIPTION The DRC-10520 is a 16 bit, 32 pin triple DIP Digital-to-Resolver converter with 2 VA drive capability. It features a power amplifier that may be driven by a standard 15 VDC power supply or by the reference source (when used with the optional power transformer DDC/PN 29306). The DRC-10520 provides compatibility with microprocessors through its 8-bit 2-byte transparent input latch. Data input is natural binary angles in TTL compatible parallel positive logic format. The DRC-10520 is comprised of a high accuracy Digital-to-Resolver converter and a dual power amplifier stage that has high accuracy and low scale factor variation. In addition, a standard BIT circuit provides a digital overcurrent signal output. A logic "0" BIT output indicates an overcurrent condition in the sine or cosine outputs. Reference inputs are scalable with external resistors. Loss of the reference signal will not damage the converter. APPLICATION The DRC-10520 can be used where digitized shaft angle data must be converted to an analog format for driving control transformers. With its built-in input latches, the DRC-10520 is especially compatible with a microprocessorbased system including flight simulators, flight instrumentation, fire control systems, radar and navigation systems, and air data computers. FOR MORE INFORMATION CONTACT: Data Device Corporation 105 Wilbur Place Bohemia, New York 11716 631-567-5600 Fax: 631-567-7358 www.ddc-web.com Technical Support: 1-800-DDC-5757 ext. 7771 All trademarks are the property of their respective owners. 1985, 1999 Data Device Corporation Data Device Corporation www.ddc-web.com +15 V DC DRC-10520 S SIN OPTIONAL SCOTT-T TRANSFORMER DUAL HI POWER AMPLIFIERS COS BIT BIT 1-16 TRANSPARENT LATCH TRANSPARENT LATCH LOGIC "0" INDICATES OVER CURRENT -15 V DC +V OR +15 -V OR -15 SYNCHRO OUTPUT D/R CONVERTER HIGH ACCURACY LOW SCALE FACTOR VARIATION C LM LA BITS 1-8 BITS 9-16 LL RH RL 2 FIGURE 1. DRC-10520 BLOCK DIAGRAM DRC-10520 T-7/08-0 tABLE 1. DRC-10520 spECIFICAtIOns Apply over temperature range power supply ranges reference voltage and frequency range and 10% harmonic distortion in the reference. pARAMEtER REsOLUtIOn ACCURACY AnD DYnAMICs Output Accuracy Without Scott-T With Scott-T P/N29305 Differential Linearity Output Settling Time DIGItAL InpUt/OUtpUt Logic Type Logic Voltage level Load Current Timing REFEREnCE InpUt Type Voltage Frequency Input Impedance Single Ended Differential AnALOG OUtpUt Type Output Current Max Output Voltage (tracks reference input voltage) Scale Factor Variation DC Offset (each line to ground) Protection VALUE 16 bits NOTES for Table 1: 1) 700ma per P/S is in relationship to driving torque loads. Large step torque loads can cause converter to pull max current. For these conditions the converter seat sink protection is very important. A solution to combat large step torque loads is to convert the large steps in position change to occur over smaller steps which will decrease peak P/S currents. 2) Output voltage can be scaled by lowering reference voltage. Factory set for fixed factor of 2. Example: 3.4V Ref x 2 "scale factor" = 6.8V Output. 3) Power calculation examples for SIN / COS 2VA total output power: 1 or 4 minutes 10 minutes (1.5 VA min for CT load) 16 minutes (2 VA min for CT load) 1 LSB Less than 40 sec for any digital input step change Natural binary angle parallel positive logic CMOS and TTL compatible. Inputs are CMOS transient protected. Logic 0 = 0 to +0.8 V Logic 1 = 2 V to 1/3 of VDD + 10% 20 A max (bit 1-16) 65 A max (LL LM LA) See Timing Diagram (FIGURES 2A&2B ). (Note 2) Differential 3.4 V rms Higher voltages are scaled by adding series resistors DC to 1 kHz 13 k 0.5% 26 k 0.5% Resolver 300 mA rms min (2 VA min) (NOTE 3) 6.8V rms max line-to-line 1% (SEE NOTE 2) Simultaneous amplitude variation in all output lines as function of digital angle is 0.1% max. 15 mV max varies with input angle. Output is protected from overcurrent short circuits and voltage feedback transients. Example to calculate the load for SIN/COS 2VA as follows. At 45, Sin = Cos 2VA = 1VA (Sin) + 1VA (Cos) SIN 45 = 0.707, COS 45 = 0.707 0.707 x (Output Voltage) 6.8V = 4.8 V 1VA/4.8V = .208A 4.8V/ .208A = 23 ohms (Load Impedance) At 0, 90, 180.... etc., when either sin or cos is maximum amplitude, the maximum current for a 2 VA load is: 6.8V/ 23 ohms = .296A Example for 80 The load impedance is 23.1 ohms: Sin dissipates 1.1808V * (1.1808V/23.1ohms) = .06VA Cos dissipates 6.697V * (6.697V/23.1ohms) = 1.94VA Total = 1.94 +0.06 = 2VA At 90 degree, sin=1, cos=0, sin(90)*6.8*A=2VA -->max current for sin signal=2/6.8=0.294A, no current for cos signal Z=6.8/.294=23.1ohm tECHnICAL InFORMAtIOn IntRODUCtIOn The DRC-10520 is a digital-to-resolver (D/R) converter which has an inherently high accuracy and low scale factor variation. The circuit is based on an algorithm whose theoretical math error is only 3.5 arc seconds and whose theoretical scale factor variation with angle is less than 0.015%. Therefore accuracy and scale factor are limited only by the physical components, not by the algorithm. The digital inputs are CMOS double buffered transparent latches (FIGURE 1). Angular output is determined by adding bits in the logic 1 state. pOWER sUppLIEs Voltage Voltage Limits Max Voltage Without Damage Current Peak Current At Power Turn On or Short Circuit (when using Transformer) tEMpERAtURE RAnGEs Operating (-3xx) (-1xx) Storage pHYsICAL CHARACtERIstICs Package Type Size Weight +15V +5% +V -V 20 V peak max 3 V above output voltage min. +18V -18V +25V -25V 20 mA 20 mA load dependent max max 700 mA max (*See Note 1) -15V +5% 0C to +70C case -55C to +125C case -55C to +135C 32 pin triple DIP 1.14 x 1.74 x 0.18 inch (29 x 44 x 4 mm) 1.15 oz (33 g) pOWER sUppLY CYCLInG Power supply cycling of the DDC converter should follow the guidelines below to avoid any potential problems. Strictly mainDRC-10520 T-7/08-0 Data Device Corporation www.ddc-web.com 3 tain proper sequencing of supplies and signals per typical CMOS circuit guidelines: - Apply power supplies first (+15, -15V and ground). - Apply digital control signals next. - Apply analog signals last. The reverse sequence should be followed during power down of the circuit. scaled by calculating the value of the scaling resistor with the following equation: R REF INPUT REF R R R REF H L DRC-10520 REFEREnCE LEVEL ADJUstMEnt The input is specified for operation at a reference level of 3.4V rms; however, reference levels other than 3.4V rms may be (VREF - 3.4) RREF = _______ x 13k 3.4 (26 - 3.4) eg., if VREF = 26 V rms, then RREF = ______ x 13k 3.4 200 nS min. TRANSPARENT LATCHED DATA 1-16 BITS 125 nS min. With LA set Lo = 125 nS min. With LL, LM, LA tied together = 200 nS min. Data Changing Data Stable FIGURE 2A. LL, LM, LA tIMInG DIAGRAM (16 BIt) LA 200 nS min. 200 nS min. 200 nS min. LM Bits (1-8) 200 nS min. LL Bits (9-16) DATA 125 nS min. 125 nS min. 125 nS min. 125 nS min. LA, LM, LL Transparent = Hi Latched = Lo Data Changing Data Stable FIGURE 2B. LL, LM, LA tIMInG DIAGRAM (8 BIt) Data Device Corporation www.ddc-web.com 4 DRC-10520 T-7/08-0 The output is 6.8V rms line-to-line resolver format signal which may be converted into a synchro format of 11.8V Iine-to-line with the companion Scott-T transformer module available as DDC P/N 29305. sin = (R -R ) A [1 + A ()] sin cos = (R -R ) A [1 + A ()] cos h l o h l o DRIVInG tHE pOWER AMpLIFIER WItH tHE REFEREnCE The high power amplifier stage can be driven by a standard 15V DC supply or with a high efficiency pulsating power supply derived from the reference voltage source. A companion power transformer DDC P/N 29306, designed to implement the pulsating power source for the DRC-10520, is also available (FIGURE 3). The DRC-10520 will not be damaged by sequencing order in the 15V, VL supplies or the reference input. The output amplifiers simultaneously track reference voltage fluctuations because they are proportional to (RH-RL). The amplitude factor AO is 2 for 6.8V rms L-L output. The maximum variation in AO from all causes is 0.3%. The term A () represents the variation of the amplitude with the digital input angle. A (), which is called the scale factor variation, is a smooth function of without discontinuities and is less than 0.1% for all values of . The total maximum variation in AO [1 + A ()] is therefore 0.4%. Because the amplitude factor (RH-RL) AO [1 + A ()] varies simultaneously on all output lines, it will not be a source of error when the DRC-10520 is to drive a ratiometric system such as a resolver or synchro. However, if the outputs are used independently, as in x-y plotters, the amplitude variations must be taken into account. OUtpUt pROtECtIOn AnD BIt The output is protected from overcurrent, short circuits and voltage feedback transients. The BIT circuit detects overcurrent conditions in the sine or cosine resolver output. A logic "0" is used for overcurrent detection. Normal operation is logic "1." The BIT line is normally at logic "1." An overload or short circuit will cause the BIT line to drop after 1 sec when the output current exceeds a peak level of approximately 450 mA. tABLE 2. pIn COnnECtIOns pIn 1 2 3 4 5 6 7 8 9 10 11 FUnCtIOn N.C. N.C. 16 (LSB) COS SIN +V -V 1 (MSB) 2 3 4 pIn 12 13 14 15 16 17 18 19 20 21 22 FUnCtIOn 5 6 7 8 LM LL 9 10 11 12 13 pIn 23 24 25 26 27 28 29 30 31 32 FUnCtIOn 14 Rl Rh 15 -15 V GND LA +15 V BIT N.C. OUtpUt pHAsInG AnD OUtpUt sCALE FACtOR The analog output signals have the following phasing: 6 3.4 Vrms 1 REFERENCE SOURCE 400 Hz 7 3 21.6 Vrms C.T. 4 R C-1 + L R H 2 +V +SIN 1 6.8 Vrms 2 6 S1 DRC-10520 GND +COS (SYNCHRO ONLY) T-1 29306 33920 5 D1 D4 D2 D3 35 V DC + C-2 5 S 8 4 -V (RESOLVER ONLY) 3 T-2 R 7 S3 S4 S2 PARTS LIST FOR 400 Hz For T1 and T2 see Ordering Information D1, D2, D3, and D4 = 1N4245 C-1 and C-2 = 22 F, 35 V DC capacitor DIGITAL INPUT 29305 32976 *29947 RESOLVER 15 V FIGURE 3. tYpICAL COnnECtIOn DIAGRAM UtILIzInG pULsAtInG pOWER sOURCE FOR sYnCHRO OUtpUt Data Device Corporation www.ddc-web.com 5 DRC-10520 T-7/08-0 tHERMAL COnsIDERAtIOns The power stage consists of two power amplifiers: one for the sine output and one for the cosine output. Maximum power stage junction temperature rise occurs at 0 and 180 for the sine output and 90 and 270 for the cosine output. Maximum power dissipation for the hybrid occurs at the interquadrant points: 45, 135, 225, and 315. At these points the total power dissipation of each amplifier is 0.707 max. Therefore, 1.00 MAX (25.4) 0.800 0.005 (20.32 0.13) 0.700 0.010 (17.78 0.25) 0.095 TYP (2.41) 0.050 TYP (1.27) 0.100 TYP (2.54) TOL NON-CUM 1.90 MAX (48.26) 1.700 0.010 (43.18 0.25) 1.600 0.010 (40.64 0.25) 0.02 TYP (0.51) 0.050 TYP (1.27) the total power dissipation is 1.41 times the max for any one amplifier. The thermal resistance junction to the outside of the case is 10.6C/W. For a 2 VA purely inductive load and 15 VDC power supplies, the junction temperature rise is 42C. For a real inductive load (one that has some power dissipation) and using pulsating supplies, the power dissipated is cut in half. The temperature rise is also halved to 21C. 0.150 TYP (3.81) (3) (4) (5) (6) (1) (2) (3) (4) BOttOM VIEW (7) (8) 0.20 (5.08) 5 TYP 32 0.40 (10.16) 0.90 MAX (22.86) 0.90 MAX (22.86) 0.600 0.010 (15.24 0.25) 0.300 (7.62) (1) (5) BOTTOM VIEW (6) (7) (2) 0.100 TYP (2.54) TOL NON-CUM 0.600 0.010 (15.24 0.25) PIN 8, 29947 ONLY TERMINALS 0.020 0.002 (0.51 0.05) x 0.187 MIN LG. BRASS SOLDER PLATED 4-40 INSERT 6 INTERNAL THREADS TERMINALS 0.020 0.002 (0.51 0.05) x 0.187 MIN LG. BRASS SOLDER PLATED 4-40 INSERT 6 INTERNAL THREADS sIDE VIEW 0.52 MAX (13.21) SIDE VIEW 0.52 MAX (13.21) FIGURE 4. pOWER tRAnsFORMER (29306, 33920) MECHAnICAL OUtLInE Dimensions are in inches (mm). FIGURE 5. OUtpUt sCOtt-t tRAnsFORMERs (29305, 32976) MECHAnICAL OUtLInE tABLE 3. tRAnsFORMER InFORMAtIOn pOWER tRAnsFORMER 29306 Freq. Range Drive Input (1-2) Output phase shift Rated Load (over -55 to +125C) 26V see note 1 note 2 sCOtt-t tRAnsFORMER 32976 33920 29305 29947 400 Hz 10% for all transformers 115V 2 VA for all transformers 6.8V 6.8V Synchro 11.8 V L-L 1.1 VA 6 min; 2.0 VA 12 min Resolver 11.8 V L-L 2.0 VA 2 min 6.8V Synchro 90 V L-L 1.1 VA 4 min 500 Vrms @ 60 Hz 2.0 oz. see note 1 note 2 Dielectric 250 Vrms 500 Vrms 500 Vrms 500 Vrms withstanding volt. @ 60 Hz @ 60 Hz @ 60 Hz @ 60 Hz (between windings) Weight 1 oz. 1 oz. 2.0 oz. 2.0 oz. Notes: 1. (3-4-5) 20.68 volts Centertapped, 7.5% Regualtion over temperature range. (6-7) 3.4 volts, 5% Regulation over temperature range. 2. Max from winding 1-2 to 6-7 is 5 for ambient temperature -55 to +125C. Data Device Corporation www.ddc-web.com 6 DRC-10520 T-7/08-0 tABLE 4. AnGLEs In DEGREEs CROss REFEREnCED tO A 16-BIt DIGItAL WORD DEGREEs (HEx) 0 (0000) 15 (0AAB) 30 (1555) 45 (2000) 60 (2AAB) 75 (3666) 90 (4000) 120 135 180 240 270 285 300 (5555) (6000) (8000) (AAAB) (C000) (CAAB) (D555) 1 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0 1 1 1 1 16 BIt DIGItAL WORD () (1 = MsB, 16 = LsB) 2 3 4 0 0 0 0 0 0 0 0 1 1 1 0 0 1 1 1 0 1 1 1 1 0 0 1 1 1 0 0 0 1 0 1 0 0 0 1 0 1 1 1 0 1 0 0 1 0 1 5 0 6 0 0 1 0 0 1 1 0 1 0 0 0 0 0 1 0 1 0 1 1 7 0 1 0 0 1 0 1 0 0 0 0 1 0 1 0 0 1 1 0 1 8 0 0 1 0 0 1 0 1 0 0 0 0 0 1 0 1 0 1 1 9 10 11 12 13 14 15 16 0 0 0 0 0 0 0 0 1 0 0 1 0 1 0 0 0 0 0 1 0 1 0 0 1 1 0 1 0 1 0 0 1 0 1 0 0 0 0 0 1 1 0 0 1 1 1 0 0 1 0 1 0 0 0 0 1 0 0 0 1 0 1 0 1 0 1 1 0 0 0 0 1 1 1 0 0 0 1 0 0 0 0 0 0 1 0 0 0 1 1 0 1 1 0 0 0 1 1 0 1 1 0 1 0 0 1 0 1 0 0 0 0 0 1 1 0 0 1 1 1 1 0 1 0 0 1 1 0 1 1 0 0 0 1 0 0 0 0 1 1 0 0 1 1 0 1 0 1 1 0 1 1 0 1 1 1 315 (E000) 330 (EAAB) 345 (F555) 359 (FFFF) 1 0 0 1 0 1 0 0 0 0 0 0 0 1 0 0 0 1 1 0 0 0 1 1 0 1 1 0 1 1 1.140 (28.96) 0.900 (22.86) 16 17 0.250 MIN (6.35) 0.175 MAX (4.45) 1.740 (44.20) 15 EQ. SP. 0.100 = 1.500 TOL NUN-CUM (2.54 = 38.1) 1 32 0.120 0.002 0.120 0.002 (3.05 0.05) (3.05 0.05) BOTTOM VIEW NOTES: 1. Dimensions shown are in inches (millimeters) 2. Lead identification numbers are for reference only. 3. Lead cluster shall be centered within 0.010 (2.54) of outline dimensions. Lead spacing dimensions apply only at seating plane. 4. Pin material meets solderability requirements of MIL-PRF-38534, Method 2003. 5. Tol 0.005 (0.13) unless otherwise noted. 0.018 0.002 DIA (TYP) (0.46 0.05) SIDE VIEW FIGURE 8. DRC-10520 MECHAnICAL OUtLInE (32 pIn tRIpLE DIp) Data Device Corporation www.ddc-web.com 7 DRC-10520 T-7/08-0 ORDERInG InFORMAtIOn DRC-10520-XXXX supplemental process Requirements: S = Pre-Cap Source Inspection L = Pull Test Q = Pull Test and Pre-Cap Inspection Blank = None of the Above Accuracy: 3 = 4 Minutes 4 = 2 Minutes 5 = 1 Minute process Requirements: 0 = Standard DDC Processing, no Burn-In (See table below.) 1 = MIL-PRF-38534 Compliant 2 = B* 3 = MIL-PRF-38534 Compliant with PIND Testing 4 = MIL-PRF-38534 Compliant with Solder Dip 5 = MIL-PRF-38534 Compliant with PIND Testing and Solder Dip 6 = B* with PIND Testing 7 = B* with Solder Dip 8 = B* with PIND Testing and Solder Dip 9 = Standard DDC Processing with Solder Dip, no Burn-In (See table below.) temperature Grade/Data Requirements: 1 = -55C to +125C (Case) 2 = -40C to +85C (Case) 3 = 0C to +70C (Case) 4 = -55C to +125C (Case) with Variables Test Data 5 = -40C to +85C (Case) with Variables Test Data 8 = 0C to +70C (Case) with Variables Test Data *Standard DDC Processing with burn-in and full temperature test -- see table below. These products contain tin-lead solder finish as applicable to solder dip requirements. stAnDARD DDC pROCEssInG FOR HYBRID AnD MOnOLItHIC HERMEtIC pRODUCts tEst INSPECTION SEAL TEMPERATURE CYCLE CONSTANT ACCELERATION BURN-IN MIL-stD-883 MEtHOD(s) 2009, 2010, 2017, and 2032 1014 1010 2001 1015 (note 1), 1030 (note 2) COnDItIOn(s) -- A and C C 3000g TABLE 1 Notes: 1. For Process Requirement "B*" (refer to ordering information), devices may be non-compliant with MILSTD-883, Test Method 1015, Paragraph 3.2. Contact factory for details. 2. When applicable. Data Device Corporation www.ddc-web.com 8 DRC-10520 T-7/08-0 The information in this data sheet is believed to be accurate; however, no responsibility is assumed by Data Device Corporation for its use, and no license or rights are granted by implication or otherwise in connection therewith. Specifications are subject to change without notice. Please visit our web site at www.ddc-web.com for the latest information. 105 Wilbur Place, Bohemia, New York 11716-2426 For technical support - 1-800-DDC-5757 ext. 7771 Headquarters, n.Y., U.s.A. - Tel: (631) 567-5600, Fax: (631) 567-7358 United Kingdom - Tel: +44-(0)1635-811140, Fax: +44-(0)1635-32264 France - Tel: +33-(0)1-41-16-3424, Fax: +33-(0)1-41-16-3425 Germany - Tel: +49-(0)89-150012-11, Fax: +49-(0)89-150012-12 Japan - Tel: +81-(0)3-3814-7688, Fax: +81-(0)3-3814-7689 World Wide Web - http://www.ddc-web.com ST ERED DATA DEVICE CORPORATION REGISTERED TO ISO 9001:2000 FILE NO. A5976 PRINTED IN THE U.S.A. T-7/08-0 9 FI RM U REG I ...
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