HO16_316aSP09_cmfb_advanced

HO16_316aSP09_cmfb_advanced - Advanced OTA Topologies CMFB...

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Unformatted text preview: Advanced OTA Topologies CMFB Implementation Boris Murmann Stanford University murmann@stanford.edu Copyright © 2009 by Boris Murmann EE315A ― HO #16 B. Murmann 1 Outline • Advanced OTA topologies p g – Making more gain • Gain boosting • Three+ stage amplification – Ahuja compensation • Common mode feedback implementation B. Murmann EE315A ― HO #16 2 Gain Boosting • Use an auxiliary feedback loop around cascode device to increase Rout and thus low-frequency gain of the overall cascode stage – Can be applied to either telescopic or folded cascode OTA architectures • References Rout VB a(s) M2 – – M1 – – B. J. Hosticka, “Improvement of the gain of MOS amplifiers,” IEEE J. Solid-State Circuits, pp. 1111-1114, Dec.1979. K. B lt G J G M Geelen, “A f t ttli CMOS op-amp f SC K Bult, G.J.G.M. G l fast-settling for circuits with 90-dB DC gain,” IEEE J. Solid-State Circuits, pp. 1379-1384, Dec. 1990. D. Flandre et al., “Improved synthesis of gain-boosted regulated cascode regulated-cascode CMOS stages using symbolic analysis and gm/ID methodology,” IEEE J. Solid-State Circuits, pp. 1006– 1012, July 1997. M. Das, “Improved design criteria of gain-boosted CMOS OTA with high-speed optimizations,” IEEE Trans. Ckts. and Systems II, pp. 204-207, March 2002. EE315A ― HO #16 B. Murmann 3 Basic Low Frequency Analysis • Can use Blackman’s impedance formula – See e.g. Gray & Meyer, 5th edition, p. 608 g y y p Z port = Z port ( k = 0 ) ⋅ 1 + T ( port shorted) 1 + T ( port open ) Rout VB Rout ( a0 = 0 ) ≅ ro 2 (1 + g m 2r01 ) a0 M2 T ( port shorted) ≅ a0 M1 gm2 ≅ a0 g m 2 + g mb 2 T ( port open ) = 0 Rout ≅ ro 2 (1 + g m 2r01 ) ⋅ ( a0 + 1) B. Murmann EE315A ― HO #16 4 High Frequency Analysis (1) • • v2 Assume ro ∞ – Finite ro does not impact high frequency behavior • Neglect backgate effect of M2 • Neglect Cgs2 and all extrinsic capacitances for simplicity • iout Cc Focus on simplest possible circuit first It turns out that the key issues are still retained with these simplifications CL g m2 m gm3 v1 1/g m2 m Cgs3 vin gm1 EE315A ― HO #16 B. Murmann 5 High Frequency Analysis (2) • T (s ) = iout C2 v2 Loop gain CL g m2 gm3 sC2 ω 1 1 = u Cgs 3 Cgs 3 s 1+ s 1+ s gm2 gm2 m gm3 v1 1/g m2 m Cgs3 vin • For reasonable phase margin, we need d gm 2 = ωp 2 > ωu Cgs 3 gm1 gm2 = k ⋅ ωu Cgs 3 B. Murmann EE315A ― HO #16 k = 2...4 6 High Frequency Analysis (3) 0 gm3 ⋅ v1 + s ⋅ C2 ⋅ v2 0 Given −gm2 ⋅ v2 − v1 + s ⋅ Cgs3 ⋅ v1 + vin ⋅ gm1 g ( ) ( v2 − v1) ⋅ gm2 iout C2 ⋅ gm1 ⋅ s ⋅ vin ⎡ ⎤ ⎢− ⎥ 2 ⎢ C2 ⋅ Cgs3 ⋅ s + C2 ⋅ gm2 ⋅ s + gm2 ⋅ gm3 ⎥ ⎢ ⎥ gm1 ⋅ gm3 ⋅ vin ⎢ ⎥ Find( v1 , v2 , iout ) simplify → ⎢ ⎥ 2 ⎢ C2 ⋅ Cgs3 ⋅ s + C2 ⋅ gm2 ⋅ s + gm2 ⋅ gm3 ⎥ ⎢ ⎥ gm1 ⋅ gm2 ⋅ vin ⋅ ( gm3 + C2 ⋅ s) ⎢ ⎥ ⎢ C ⋅ C ⋅ s2 + C ⋅ g ⋅ s + g ⋅ g ⎥ 2 m2 m2 m3 ⎦ ⎣ 2 gs3 1+s Gm ( s ) gm1 ⋅ C2 C2 gm3 Cgs3 C2 2 ⋅s + ⋅s + 1 gm3 gm2 gm3 ⋅ 1+ gm1 ⋅ s s 2 k⋅ ω u 2 1+ ωu + s ωu gm1 ⋅ +1 s 2 ωP 2 + s ωz ωu s +1 ω P ⋅ QP EE315A ― HO #16 B. Murmann ωP QP ωu k⋅ ω u 1 k 7 Voltage Transfer Function [Das] astage ( s ) = = B. Murmann vout Gm ( s ) = v iin sCL gm1 sCL “Pole-zero doublet” s 1+ ωu 1+ s s2 + 2 ωu k ωu EE315A ― HO #16 8 Issues with Pole-Zero Doublet (1) B.Y.T. Kamath, R.G. Meyer and P.R. Gray, "Relationship between frequency response and settling time of operational amplifiers," IEEE JSSC, Vol. 9, No. 6, pp.347–352, Dec. 1974. B. Murmann EE315A ― HO #16 9 Issues with Pole-Zero Doublet (2) For fast and accurate settling, need either small pole-zero spacing or large ωz pole zero B.Y.T. Kamath, R.G. Meyer and P.R. Gray, "Relationship between frequency response and settling time of operational amplifiers, IEEE JSSC, Vol. 9, No. 6, pp.347 352, Dec. 1974. amplifiers," pp.347–352, B. Murmann EE315A HO #16 10 Observations – Gain Boosting • Assuming that fast and accurate transient settling is required – The unity gain frequency of the auxiliary amplifier (ωu) must be at a high frequency to avoid pole-zero doublet issues – On the other hand, we need ωu < ωp2 for stability • Rule of thumb – Place wz between unity gain frequency of overall feedback circuit (ωc) and non-dominant pole (gm2/Cgs3) • Practical design outcomes have shown that gain boosting adds only about 20-30% to the total power dissipation of an OTA – Mostly because C2 < CL B. Murmann EE315A ― HO #16 11 Implementation Examples (1) [Bult] B. Murmann EE315A ― HO #16 12 Implementation Examples (2) M.M. Ahmadi, “A New Modeling and Optimization of Gain-Boosted Cascode Amplifier for High-Speed and Low-Voltage Applications,” IEEE TCAS II, pp. 169-173, pp , , pp , March 2006. B. Murmann EE315A ― HO #16 13 Implementation Examples (3) [Chiu et al., ISSC 2004] • Gain boosted gain boosters! • Gain ~ gmro6, design achieved av0=130dB in 0 18μm technology 0.18μm 0 130dB B. Murmann EE315A ― HO #16 14 Implementation Examples (4) [Yang et al., JSSC 12/2001] • Differential pair (instead of CS stages) and separate common mode feedback in second stage EE315A ― HO #16 B. Murmann 15 Four Stage Amplifier [Mitteregger, ISSCC 2006] • Uses “nested Miller compensation” – See Gray & Meyer, chapter 9 Meyer • Manageable design problem for continuous time circuits – Very hard to design for applications that require fast settling • E g SC circuits E.g. B. Murmann EE315A ― HO #16 16 Ahuja Compensation (1) [Ahuja, JSSC 12/1983] • CG stage blocks feedforward through Cc • Non-dominant pole is usually at higher frequencies when compared to Miller compensation – See Gray & Meyer, chapter 9 B. Murmann EE315A ― HO #16 17 Ahuja Compensation (2) • Issues – Additional power dissipation – Bias current mismatches cause input referred offset • The above two issues can be addressed by feeding back to cascode device embedded in first stage – See Ribner, JSSC 12/1984 – New issue: Complex design problem (3rd order system) • Sometimes poles go off-axis, resulting in noise peaking, etc. • Bottom line – Relatively hard to design – Questionable “return on investment” in terms of design time B. Murmann EE315A ― HO #16 18 Implementation Example [Feldman et al., JSSC 10/1998] • Capacitive level shift allows NMOS CS stages in second stage • Design uses Ahuja style compensation Ahuja-style B. Murmann EE315A ― HO #16 19 Common Mode Feedback • Implementation aspects – How to sense – How to compare to desired value – How to provide a "knob" for adjusting Voc B. Murmann EE315A ― HO #16 20 Knob Vop Vom AVG ITAIL Vcntrl M=2 M=1 • M=1 Voc Voc,desired Typically generate ~50% of tail current with fixed bias, leave remaining 50% as tuning range for CMFB loop B. Murmann EE315A ― HO #16 21 Comparison Circuit • Low frequency loop gain T0 ≅ gmx·rop1/2 ·(gmp2/2)/(gmx/2) – Loop will control Voc more accurately if Mp1 is cascoded B. Murmann EE315A ― HO #16 22 Sensing • • Using a resistive divider may “destroy” differential gain destroy Solutions – Use source followers to drive divider (headroom issue) – Purely capacitive sensing B. Murmann EE315A ― HO #16 23 Resistor-Based CMFB Example R. Schreier, et al., "A 375-mW Quadrature Bandpass Delta Sigma ADC With 8.5-MHz BW and 90-dB DR at 44 MHz," IEEE J. Solid-State Circuits, vol. 41, no. 12, pp.2632-2640, Dec. 2006. B. Murmann EE315A ― HO #16 24 SC CMFB Implementation Example • Circuit uses switched capacitors (CM) to set the voltage across sensing capacitors (CCM) [Feldman et al., JSSC 10/1998] B. Murmann EE315A ― HO #16 25 "Passive" CMFB (1) • • During φ1: Initialize voltage across Ccmfb to Voc,desired - VB During φ2: Activate feedback loop – If Voc>Voc,desired, Vcntrl becomes >VB and lowers Voc B. Murmann EE315A ― HO #16 26 "Passive" CMFB (2) • OTA cannot be used during φ1, because the common mode feedback f db k mechanism i i h i is inactive i – Often not a problem in switched capacitor circuits, where the OTA is active only during one half-cycle • Can use switched capacitor scheme shown on slide 24 to enable uninterrupted common mode feedback • Unfortunately, Unfortunately this simple circuit cannot be used if an additional inversion is needed in the common mode feedback loop – E.g. won't work for a two-stage OTA that uses a single common mode feedback loop – Will work for the two-stage OTA with separate CMFB loops as shown on slide 15 B. Murmann EE315A ― HO #16 27 Common Mode Half Circuit • Low frequency loop gain T0 ≅ • Loop crossover f L frequency ωc ≅ • Ccmfb gmx rop ⋅ C 2 Ccmfb + x 2 1 Ccmfb gmx Cx C ⋅ 0.5Cx 2C CL + cmfb cmfb + 2 Ccmfb + 0.5Cx Nondominant pole N d i t l ωp 2 ≅ B. Murmann EE315A ― HO #16 gmn Cy 28 Design Considerations • The required bandwidth of the common mode loop strongly depends on the amount of expected imbalance, common mode transients or ac components t i t t – In an ideal world, the common mode is not affected by the signal and hence stays constant • In this case, the bandwidth of the CMFB loop is unimportant • For robustness in practical implementations, the bandwidth of the common mode loop is often chosen to be about 30% of the p differential signal path bandwidth – In a typical switched capacitor circuit with 10 time constants differential settling, this means that the common mode has about 3 time constants to settle • Enough time to remove 95% of common mode disturbance B. Murmann EE315A ― HO #16 29 ...
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This note was uploaded on 08/13/2009 for the course EE 315 taught by Professor Borismurmann during the Spring '09 term at Stanford.

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