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hw02 - problem - a test set that detects all single...

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The University of Texas at Dallas Dept. of Electrical Engineering EE/CE 6303: Testing and Testable Design HW # 2: Due on Thursday Sept. 18, 2008 When you submit your homeworks, to help us grade and identify your work, you need to comply with the following guidelines carefully: Have a cover page for your homework and write clearly: (1) your name as it appears in your student ID card , (2) course name/number, and (3) homework number. Identify the problems clearly by starting the solution of each problem on top of a new page and putting the problem number as given in the homework description. For example, for the problem 1 in this homework, you can put: HW#2 – Problem 1 on top of the page. Please staple the solution pages in order as given in the homework description. If you don’t have a solution for a problem, put a blank page with the problem number on top. 1. Prove the checkpoint theorem, i.e.
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Unformatted text preview: a test set that detects all single stuck-at faults at the checkpoints of a combinational circuit detects all single stuck-at faults in that circuit. 2. Without changing/optimizing the following circuits: (i) Use SYNOPSYS toolset to model and implement the circuits at the gate level. (ii) Find all stuck-at faults, the test vectors and the fault coverage. If fault coverage is not 100% show the undetected faults reported by the tool. (iii) Verify the results reported by the tool with your hand-work analysis. (iv) Find and draw the fault coverage curve (coverage versus patterns) for three different orders of the test patterns that Tetramax generates. Compare and discuss your results. Check the course webpage for some guidelines on how to use SYNOPSYS. (a) x y z a b d c f2 f1 a b c z (c) (b) 1...
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