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Unformatted text preview: a test set that detects all single stuck-at faults at the checkpoints of a combinational circuit detects all single stuck-at faults in that circuit. 2. Without changing/optimizing the following circuits: (i) Use SYNOPSYS toolset to model and implement the circuits at the gate level. (ii) Find all stuck-at faults, the test vectors and the fault coverage. If fault coverage is not 100% show the undetected faults reported by the tool. (iii) Verify the results reported by the tool with your hand-work analysis. (iv) Find and draw the fault coverage curve (coverage versus patterns) for three different orders of the test patterns that Tetramax generates. Compare and discuss your results. Check the course webpage for some guidelines on how to use SYNOPSYS. (a) x y z a b d c f2 f1 a b c z (c) (b) 1...
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This note was uploaded on 08/23/2009 for the course EE 6303 taught by Professor Mehrdadnourani during the Fall '08 term at University of Texas at Dallas, Richardson.
- Fall '08
- Electrical Engineering