Project7326F08 - EE7326.501 Semester Project Due:...

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EE7326.501 Semester Project Due: Wednesday, November 5 The semester project is to design and simulate a single-ended 4 th Order Switched-Capacitor Low-Pass Filter including the switches, amplifers and current re±erence that is shown on the next page. The supplies are V DD = 5V, GND = 0V and the analog ground or common mode voltage V CM = 2 . 5V. Then to turn in a type written report on what you did to accomplish meeting the ±ollowing specifcations: Given that clock ±requency is f clk = 500kHz, the flter corner ±requency will be approximately f c = 5kHz Output swing o± 3.5V pp with a 5V supply. PSRR > 40dB @ 5kHz ±rom V DD Total Output Noise: v 2 out 1 2 < 70 μ V rms integrated ±rom 10Hz to 10kHz. Total Harmonic Distortion: THD < - pp sinewaves SPICE analysis o± your circuit ±or all conditions that prove you met all o± the specs on the fnal circuit. Also show SPICE simulation o± your amplifer design. The SPICE print fle, showing the netlist and operating point output data, ±or each simulation and plots o± data where possible.
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This note was uploaded on 08/23/2009 for the course EE 7326 taught by Professor Jimhellums during the Fall '08 term at University of Texas at Dallas, Richardson.

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Project7326F08 - EE7326.501 Semester Project Due:...

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