04_Differential_Amp1

04_Differential_Amp1 - EE6326 Analog IC Design Fall 2008...

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1 1 WLCHEN EE6326 Analog IC Design – Fall 2008 Topic 4. Differential Amplifiers Wenliang Chen, Ph.D. Instructor
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2 2 WLCHEN Outline • Differential Amplifiers – Fully differential at input & output – Differential input & single-ended output • Input Common Mode Range (ICMR) •O u t p u t s w i n g • Offset voltage • Differential mode gain – Half-circuit concept • Common mode responses • Common mode rejection ratio (CMRR) – Circuit examples and systems
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3 3 WLCHEN Single-ended and Differential Operation • A single-ended signal is measured with respect to a fixed potential • A differential signal is measured between two nodes that have equal and opposite signal excursions around a fixed potential. – “Common-mode” (CM) level.
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4 4 WLCHEN Effect of Supply Noise Noise at the inputs and noise from substrate are also common mode noises!
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5 5 WLCHEN Major Advantages of Differential Signaling • Immunity of “Environmental” Noise – Noise coupling from digital lines – Power supply noise – Differential noisy lines • Increase the maximum achievable voltage swing (x2) -1v 1v 0v Single-ended swing: 2v -1v to 1v Differential swing: 4v -2v to 2v
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6 6 WLCHEN Differential Input Stages Input polarity and phase shifts NMOS input vs PMOS input Differential Input Single-ended Output Vout Vin- Vin+ Vb M1 M2 Vout+ Vin- Vin+ Vb Vout- M1 M2 Fully differential RD RD
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7 7 WLCHEN Input-output Characteristics When Vin1<<Vin2, M1 off, M2 on, I D2 =I SS , Vout1=VDD, Vout2=VDD-R D I SS vice versa When Vin1=Vin2, both M1 and M2 are on, Each get half the current, Vout1=Vout2=VDD-R D I SS /2 Nonlinear
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8 8 WLCHEN Differential Amplifier with Active Current Mirror Load Active current mirror that “process” signal Differential Mode
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9 9 WLCHEN Input Common Mode Range (ICMR) 1. Tie both inputs together 2. Sweep the input voltage and find the input voltage range in which all transistors are saturated Vin,CM=Vgs1+Vod3=Vth1+Vod1+Vod3
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10 10 WLCHEN ] V , V 2 I R min[V V ) V (V V DD T1,2 SS D DD in,CM T3 GS3 GS1 + + V GS1 =V T1 +sqrt{2*I ss /2/[K’*(W/L) 1 ]} Iss Id1=Id2=Id3/2=Iss/2 V GS3 =V T3 +sqrt{2*I ss /[K’*(W/L) 3 ]} Input Common Mode Range (Important basic concept)
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11 11 WLCHEN Input Common Mode Range for different types of differential pairs (Important basic concept) 1. Tie both inputs together. 2. Sweep the input voltage and find the input voltage range in which all transistors are saturated. 3. Device has high gain & output impedance in saturation region th1 th3 DD in,cm th1 od1 od0 V V V V V V V + < < + + th1 th3 DD in,cm th1 od1 od0 V V V V V V V + < < + + Vout Vb M1 M2 Vout2 Vin,cm Vb M1 M2 Vout1 M3 M4 M3 M4 Vin,cm M0 Vout2 Vb M1 M2 Vout1 M3 M4 Vin,cm M0 M0 th1 od3 DD in,cm th1 od1 od0 V V V V V V V + < < + + VDD VSS VDD VSS VDD VSS
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12 12 WLCHEN DD out,1 T1 in,cm V V ) V (V Iss For a fixed Vin,cm, Vout > Vin,cm – Vth to keep M1 in saturation region The upper limit is VDD Output Swing Range (Important basic concept)
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13 13 WLCHEN Output Swing for different types of differential pairs (Important basic concept) 1. Tie both inputs together.
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04_Differential_Amp1 - EE6326 Analog IC Design Fall 2008...

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