L14 Testing

L14 Testing - Testing He's dead Jim. 6.371 Fall 2002...

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L14 – Testing 1 6.371 – Fall 2002 10/23/02 Testing He’s dead Jim. ..
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L14 – Testing 2 6.371 – Fall 2002 10/23/02 Design Defects If you don’t test it, it won’t work! If you don’t test it, it won’t work! Design Specification ? ± it helps to have a specification to compare against! ± if specification is written in a hardware description language from which the design is synthesized then the design should be defect-free (modulo bugs in the synthesis software!) Of course the specification may be buggy. .. ± everyone feels better if the design/specification are “run” in the environment in which they will be used. For example, in testing a processor chip, one might boot the operating system and run some key programs, all under simulation. This leads to the need for lots of simulation cycles, e.g., as provided by a hardware emulation system . Now-a-days these are built using a small army of FPGA’s. Other choices: in-circuit emulation, cycle-based simulators.
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L14 – Testing 3 6.371 – Fall 2002 10/23/02 Manufacturing Defects Goal: verify every gate is operating as expected Defects from misalignment, dust and other particles, “stacking” faults, pinholes in dielectrics, mask scratches & dirt, thickness variations layer- to-layer shorts, discontinuous wires (“opens”), circuit sensitivities (V TH , L CHANNEL ). Find during wafer probe of test structures. Defects from scratching in handling, damage during bonding to lead frame, mfg defects undetected during wafer probe (particularly speed-related problems). Find during testing of packaged parts. Defects from damage during board insertion (thermal, ESD), infant mortality (mfg defects that show up after a few hours of use). Also noise problems, susceptibility to latch-up, . .. Find during testing/burn-in of boards. Defects that only appear after months or years of use (metal migration, oxide damage during manufacture, impurities). Found by customer (oops!). Cost of replacing defective component increases by an order of magnitude with each stage of manufacture. Cost of replacing defective component increases by an order of magnitude with each stage of manufacture.
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L14 – Testing 4 6.371 – Fall 2002 10/23/02 Testers The device under test (DUT) can be a site on a wafer or a packaged part. Each pin on the chip is driven/observed by a separate set of circuitry which typically can drive the pin to one data value per cycle or observe (“strobe”) the value of the pin at a particular point in a clock cycle. Timing of input transitions and sampling of outputs is controlled by a small (<< # of pins) number of high-resolution timing generators. To increase the number of possible input patterns, different data “formats” are provided: t CYCLE non-return-to-zero (NRZ) return-to-zero (RTZ) return-to-one (RTO) surround-by-complement (SBC) data data data data ~data ~data pin circuitry 100’s
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L14 – Testing 5 6.371 – Fall 2002 10/23/02 Testing Approaches Plan: supply a set of
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L14 Testing - Testing He's dead Jim. 6.371 Fall 2002...

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