L17 Packaging

L17 Packaging - Packaging 6.371 Fall 2002 11/1/02 L17...

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L17 – Packaging 1 6.371 – Fall 2002 11/1/02 Packaging
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L17 – Packaging 2 6.371 – Fall 2002 11/1/02 Packaging Technologies Packages are an important component of modern electronic system providing: ± signal input/output ± power supply connections ± heat removal ± physical support ± environmental protection [ Toshiba ]
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L17 – Packaging 3 6.371 – Fall 2002 11/1/02 Package Types Through-hole Mounted Surface Mounted Cavity-Up Pin Grid Array (PGA) Cavity-Down PGA Ball Grid Array (BGA) Plastic Thin Quad Flat Pack (TQFP) Dual Inline Package (DIP) Chip-Scale Package (CSP) Plastic BGA [Philips]
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L17 – Packaging 4 6.371 – Fall 2002 11/1/02 Package Metrics ± Cost ($) ± Size ± Thermal performance high heat removal rate managing difference in coefficient of thermal expansion between die and printed circuit board (PCB) ± Number of I/Os signal plus power and ground ± I/O parasitics resistances, capacitances, and inductances low coupling between signals ± Ease of test need to test packaged parts before system assembly ± Reliability
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L17 – Packaging 5 6.371 – Fall 2002 11/1/02 Pin-Grid Array Assembly Process Tested Wafer Saw Die Die Attach (glue to package) Oven Cure Die Attach Wire bond pads on die to pads on package Glue lid on package Oven Cure Lid Attach Screen Printing Final Test
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L17 – Packaging 6 6.371 – Fall 2002 11/1/02 Bond Wires ± Usually ultrasonic welding connects wire to package and die pad ± Bond wires can be aluminum or gold ± Different thicknesses of bond wire tradeoff parasitic inductance and resistance versus density ± Can wirebond to die pad pitches of around 100 µ m Wire bonding machine
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L17 – Packaging 7 6.371 – Fall 2002 11/1/02 Flip-Chip Mounting ± Advantages are greater number of high quality I/Os – very low capacitance and inductance ± Disadvantages are cost, difficulty of heat removal, and potential thermal strain between die and package Solder bumps placed
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L17 Packaging - Packaging 6.371 Fall 2002 11/1/02 L17...

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