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lecture38 - Lecture#38 ANNOUNCEMENTS Prof King's Office...

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Lecture 38, Slide 1 EECS40, Fall 2003 Prof. King Lecture #38 ANNOUNCEMENTS Prof. King’s Office Hour today is changed back to 4-5 PM HW#11, Problem 4 : The number of dice per wafer must be rounded down to an integer value! Reminder: Tutebot projects are due beginning 12/2 HW#12 (short assignment) will be due 12/5 Discussion sections and lab sections will continue as usual OUTLINE Propagation delay with interconnect Inter-wire capacitance Pi model for capacitive coupling Coupling capacitance effects – loading – crosstalk Lecture 38, Slide 2 EECS40, Fall 2003 Prof. King Propagation Delay with Interconnect wire wire dr fanout wire dr intrinsic dr p C R R C R R C R t ) 38 . 0 69 . 0 ( ) ( 69 . 0 69 . 0 + + + + = wire wire dr fanout wire dr intrinsic dr D p C R R C R R C R t ) ( 69 . 0 ) ( 69 . 0 69 . 0 69 . 0 + + + + = = τ Using the lumped-RC interconnect model: In reality, the interconnect resistance & capacitance are distributed along the length of the interconnect. Æ The interconnect delay is actually less than R wire C wire : The 0.38 factor accounts for the fact that the wire resistance and capacitance are distributed.
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Lecture 38, Slide 3 EECS40, Fall 2003 Prof. King B Wire B has additional sidewall capacitance to neighboring wires C
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