L12_adv_digital_comm

L12_adv_digital_comm - Advanced Digital Communications...

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1 6.02 Spring 2008 Lecture 12 Advanced Digital Communications 1 Advanced Digital Communications Wireless Channel - Multipath Multitone systems Timing/Synchronization 6.02 Spring 2008 Lecture 12 Advanced Digital Communications 2 Simplified view of wireless channel - multipath Tx Rx 00 (,) direct path A T 111 (,,) reflection A T θ () Channel Hf 0 11 2 (2 ) 01 jf T T Channel A e A e π −+ =+ Attenuation and delay both related to distance Attenuation ~1/d 2 Delay ~ d Tx Rx t t 0 1 T 2 T
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2 6.02 Spring 2008 Lecture 12 Advanced Digital Communications 3 Frequency view of the channel Channel shows considerable frequency selectivity Causes intersymbol interference in time domain A 1 =0.1 , T =10ns and 2 =0.05 , =30ns i.e. d =3m, d =9m Tx Rx t t 0 1 T 2 T 6.02 Spring 2008 Lecture 12 Advanced Digital Communications 4 Real wireless channel http://tbn0.google.com/images?q=tbn:mAlNgCY4iyh5mM:http://www.kn-s.dlr.de/People/Haas/multipath_propagation.jpg
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3 6.02 Spring 2008 Lecture 12 Advanced Digital Communications 5 Real wireless channel – frequency view 0 20 40 60 80 0 10 20 30 40 -30 -20 -10 0 10 20 30 0 20 40 60 80 0 10 20 30 40 -30 -20 -10 0 10 20 30 0 20 40 60 80 0 10 20 30 40 -50 -40 -30 -20 -10 0 10 20 30 T im e [ s ] i m f r q u n c y M H z |H(f,t)| [dB] |H(f,t)| |H(f,t)| Time-varying Frequency- selective (multipath) 6.02 Spring 2008 Lecture 12 Advanced Digital Communications 6 Communication theory view Multitone modulations Convolutional/Block coding and Viterbi/RS decoding Synchronization – tracking loops Channel Estimation coder IFFT/ Modulator Channel Decoder FFT/ Demodulator Timing Synchronizer Theory/ Algorithm Channel Est.
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4 6.02 Spring 2008 Lecture 12 Advanced Digital Communications 7 Very complicated – so divide & conquer coder Filter/ Modulator Channel decoder Filter/ Demodulator Timing Synchronizer Inner Tx Outer Tx Inner Rx Outer Rx DQ Clk Logic A DQ Clk Logic B DQ Clk D Q Clk Logic A DQ Clk Logic A Logic B Logic B D Q Clk Logic A D Q Clk Logic B D Q Clk D Q Clk Logic A Clk Logic A Logic B Logic B Theory Algorithm μArchitecture Gate Level Physical Design First 802.11a chip – by Meng et al 2003
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This note was uploaded on 08/23/2009 for the course EECS 6.02 taught by Professor Terman during the Spring '08 term at MIT.

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L12_adv_digital_comm - Advanced Digital Communications...

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