hw8_arith_circuits_registers

Hw8_arith_circuits_r - MASSACHUSETTS INSTITUTE OF TECHNOLOGY DEPARTMENT OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE 6.02 Introduction to EECS II

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6.02 Spring 2008 1 of 3 Homework #8 M ASSACHUSETTS I NSTITUTE OF T ECHNOLOGY D EPARTMENT OF E LECTRICAL E NGINEERING AND C OMPUTER S CIENCE 6.02 Introduction to EECS II Spring 2008 Homework #8: Arithmetic Circuits & Registers Issued: April 4, 2008 Due: April 11, 2008 Problem 1 . Calculate the following using 6-bit 2's complement arithmetic (which is just a fancy way of saying to do ordinary addition in base 2 keeping only 6 bits of your answer). Show your work using binary (base 2) notation. Remember that subtraction can be performed by negating the second operand and then adding it to the first operand. 13 + 10 15 - 18 27 - 6 -6 - 15 21 + (-21) 31 + 12 Explain what happened in the last addition and in what sense your answer is "right". Problem 2 . Suppose we have two 2’s complement numbers, one of N bits and one of M bits (without loss of generality let N M). What is the minimum number of bits needed to represent the sum of the two numbers without any loss of information? What about the product of the two numbers? Problem 3 . Consider the following diagram of a simple sequential circuit: The components labeled CL1 and CL2 are combinational; R1 and R2 are edge-triggered D registers. Timing parameters for component are as noted (we’re ignoring the registers’
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This note was uploaded on 08/23/2009 for the course EECS 6.02 taught by Professor Terman during the Spring '08 term at MIT.

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Hw8_arith_circuits_r - MASSACHUSETTS INSTITUTE OF TECHNOLOGY DEPARTMENT OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE 6.02 Introduction to EECS II

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