lab6_addendum

lab6_addendum - MASSACHUSETTS INSTITUTE OF TECHNOLOGY...

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6.02 Spring 2008 1 of 2 Lab #6 M ASSACHUSETTS I NSTITUTE OF T ECHNOLOGY D EPARTMENT OF E LECTRICAL E NGINEERING AND C OMPUTER S CIENCE 6.02: Introduction to EECS II Spring 2008 Lab #6 Addendum: How to test your modules The lab write up encourages you to use modular approach to designing the decoder circuit, i.e., to start by designing XOR3, XOR5, XOR15, FIX and CORRECT modules and the use them as building blocks to create the decoder module. A similar modular approach should be used to debug your circuit – if you make sure each module works by itself, it’ll be much easier to get the final combined design to work. Here’s some help in how to do that. When you’re done entering your initial design based on lab6_template.jsim your JSim file will look something like the following (I’ve left out the comment lines just to keep the listing short): .include "/mit/6.02/Labs/Lab6/gates.jsim .include "/mit/6.02/Labs/Lab6/lab6checkoff.jsim" .subckt decode d1 d2 d3 d4 d5 d6 d7 d8 r1 r2 c1 c2 c3 c4 p
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This note was uploaded on 08/23/2009 for the course EECS 6.02 taught by Professor Terman during the Spring '08 term at MIT.

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lab6_addendum - MASSACHUSETTS INSTITUTE OF TECHNOLOGY...

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