lab6_digital_logic

# lab6_digital_logic - MASSACHUSETTS INSTITUTE OF TECHNOLOGY...

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6.02 Spring 2008 1 of 7 Lab #6 M ASSACHUSETTS I NSTITUTE OF T ECHNOLOGY D EPARTMENT OF E LECTRICAL E NGINEERING AND C OMPUTER S CIENCE 6.02: Introduction to EECS II Spring 2008 Lab #6: Digital Logic Goal: Design a combinational logic circuit that implements a decoder for the (15,8,4) error correcting code we used in Lab 5. Verify the design using the JSim logic simulator. Instructions: 1. Read Introduction to JSim (in the General section of the Handouts webpage). 2. Complete the pre-lab (see first section below). There are questions to be answered, please write your responses on a separate sheet of paper and turn them in at the beginning of lab on Wednesday. 3. Complete the activities for Wednesday’s lab (see second section below). 4. Prepare the requested material and think about the questions posed on the Check- off Sheet, then find a staff member to complete your post-lab interview. Pre-lab (due in lab, Wed., April 2, 2008) The “Entering a circuit” section in Introduction to JSim will be useful background reading for the tasks below. A list of the pre-built gates in the 6.02 gates library appears at the end of this section – use these as the building blocks for your designs. Question 1 : Design a Q1 module that computes Z = A B + C B . Write your answer in the form of JSim .subckt: .subckt Q1 a b c z * your netlist statements go here .ends Question 2 : Draw a schematic diagram and provide a truth table for the function implemented by the following JSim .subckt. This function turns out to be implemented directly by one of the gates in the gates library. Which one? .subckt Q2 a b z X1 b binv inverter X2 a b binv z mux2 .ends

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6.02 Spring 2008 2 of 7 Lab #6 Question 3: Design a Q3 module with three inputs (A, B, Cin) and two outputs (S, Cout) based on the following truth table. Write your answer in the form of a JSim .subckt. A B Cin S Cout 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 Question 4: A binary-to-seven-segment decoder takes 4 bits of input and produces seven outputs, one for each “segment” in a standard display: Given the appropriate binary input, this decoder produces outputs that light up the display in the following manner: Construct a truth table for segment 3. Create a JSim .subkt that implements the necessary circuit to map the four inputs to the control signal for segment 3. You might find it
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## This note was uploaded on 08/23/2009 for the course EECS 6.02 taught by Professor Terman during the Spring '08 term at MIT.

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lab6_digital_logic - MASSACHUSETTS INSTITUTE OF TECHNOLOGY...

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