class10 - 1 CMOS Transistors and Inverters Dr. Jerry L....

Info iconThis preview shows pages 1–9. Sign up to view the full content.

View Full Document Right Arrow Icon
8/12/03 Transistor Review 1 CMOS – Transistors and Inverters Dr. Jerry L. Hudgins Department of Electrical Engineering University of South Carolina
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
8/12/03 Transistor Review 2 Complimentary-MOS Logic (CMOS) PMOS (P-channel enhancement-mode Metal Oxide Semiconductor transistor) NMOS (N-channel enhancement-mode Metal Oxide Semiconductor transistor) G G G G G G D D D D D D S S S S S S B B
Background image of page 2
8/12/03 Transistor Review 3 Definition of Symbols 1 to 5 V/ µ m Saturation Electric Field Value E sat 0.1 to 0.5 µ m Effective Channel Length L 0.2 to 3 µ m Effective Channel Width W 3 to 10 fF/ µ m 2 Oxide Capacitance per Unit Area C ox 150 cm 2 /Vs Surface Hole Mobility µ p 400 cm 2 /Vs Surface Electron Mobility n -0.8 to 0.8 V MOS Threshold Voltage V T -3 to 3 V Gate-Source Voltage GS -3 to 3 V Drain-Source Voltage DS 1 µ A to 100 mA Drain Current I D Typical Values and Units Description Symbol
Background image of page 3

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
8/12/03 Transistor Review 4 Definitions of Some Derived Symbols k n = µ C ox = ε /t Process Transconductance Parameters (A/V 2 ) p = = /t Gain Factors (A/V 2 ) = k (W /L ) (W /L )
Background image of page 4
8/12/03 Transistor Review 5 Metal Oxide Semiconductor Field-Effect Transistor Behavior In the resistive region of operation for NMOS: ) ( 2 ) ( 2 ) ( 1 2 2 DS DS DS T GS ox n DS DS T GS sat DS ox n D V V V V V L W C V V V V L W L E V C I κ µ = + = L E V V sat DS DS + = 1 1 ) ( For long channels or small drain-source voltages, approaches 1 and the expression for the drain current reduces to the traditionally used equation describing a MOSFET in its resistive region of operation. V DS / L is approximately the average electric field in the channel.
Background image of page 5

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
8/12/03 Transistor Review 6 Metal Oxide Semiconductor Field-Effect Transistor Behavior In the saturation region of operation for NMOS: When the electric field in the channel reaches the saturation value, then all carriers at the drain reach the saturation drift velocity ( v sat = 10 5 cm/s) and the drain current remains constant (to first order at I Dsat ) with respect to increases in drain-source voltage. ) ( ) ( 2 ) ( 2 DSsat T GS ox sat DSsat DSsat DSsat T GS ox n Dsat V V V W C v V V V V V L W C I = = κ µ L E V V V V V sat T GS T GS DSsat + = 1
Background image of page 6
8/12/03 Transistor Review 7 PMOS Equations In the saturation region of operation for PMOS: ) ( ) ( 2 ) ( 2 DSsat T GS ox sat DSsat DSsat DSsat T GS ox p Dsat V V V W C v V V V V V L W C I = = κ µ L E V V V V V sat T GS T GS DSsat + = 1 In the resistive region of operation for PMOS: ) ( 2 ) ( 2 ) ( 1 2 2 DS DS DS T GS ox p DS DS T GS sat DS ox p D V V V V V L W C V V V V L W L E V C I = + = L E V V sat DS DS + = 1 1 ) (
Background image of page 7

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
8/12/03 Transistor Review 8 CMOS Buffer/Inverter – Static Operation V DD V in V out C L V in = 0 V V GSp < 0 V, V GSn = 0 V PMOS “On”, NMOS “Off” V out DD V = V
Background image of page 8
Image of page 9
This is the end of the preview. Sign up to access the rest of the document.

Page1 / 34

class10 - 1 CMOS Transistors and Inverters Dr. Jerry L....

This preview shows document pages 1 - 9. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online