Lecture_08_Multiprocessors and Task-level parallelism

Lecture_08_Multiprocessors and Task-level parallelism -...

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CA Lecture08 - multiprocessors and TLP (cwliu@twins.ee.nctu.edu.tw) 08-1 5008: Computer Architecture 5008: Computer 5008: Computer Architecture Architecture Chapter 4 Chapter 4 Multiprocessors and Multiprocessors and Thread Thread - - Level Parallelism Level Parallelism
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CA Lecture08 - multiprocessors and TLP (cwliu@twins.ee.nctu.edu.tw) 08-2 On SMT… • “Simultaneous Multithreading: A Platform for Next-generation Processors,” Susan J. Eggers et al, IEEE Micro, 1997 • What were worse options than SMT for 1B transistors? • What is the main extra hardware resource that SMT requires? • What is “Vertical” and “Horizontal” waste? • How does SMT differ from Multithreading? • What unit is the bottleneck for SMT
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CA Lecture08 - multiprocessors and TLP (cwliu@twins.ee.nctu.edu.tw) 08-3 On SMT… (con’t) • How many instructions fetched per clock cycle? From how many threads? • How did it do priority? • What assumption made about computer organization before add SMT? – When did they think it would ship? – How compare to slide 06-47? – What was memory hierarchy?
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CA Lecture08 - multiprocessors and TLP (cwliu@twins.ee.nctu.edu.tw) 08-4 Outline Review MP Motivation SISD v. SIMD v. MIMD Centralized vs. Distributed Memory Challenges to Parallel Programming Consistency, Coherency, Write Serialization Write Invalidate Protocol Example Conclusion
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1 10 100 1000 10000 1978 1980 1982 1984 1986 1988 1990 1992 1994 1996 1998 2000 2002 2004 2006 Performance (vs. VAX-11/780) 25%/year 52%/year ??%/year Uniprocessor Performance (SPECint) VAX : 25%/year 1978 to 1986 RISC + x86: 52%/year 1986 to 2002 RISC + x86: ??%/year 2002 to present From Hennessy and Patterson, Computer Architecture: A Quantitative Approach , 4th edition, 2006 3X
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Trend? “… today s processors are nearing an impasse as technologies approach the speed of light. . David Mitchell, The Transputer: The Time Is Now ( 1989 ) Transputer had bad timing (Uniprocessor performance ) Procrastination rewarded: 2X seq. perf. / 1.5 years •“ We are dedicating all of our future product development to multicore designs. This is a sea change in computing Paul Otellini, President, Intel ( 2005 ) All microprocessor companies switch to MP (2X CPUs / 2 yrs) Procrastination penalized: 2X sequential perf. / 5 yrs 32 4 4 2 Threads/chip 4 2 2 1 Threads/Processor 8 2 2 2 Processors/chip Sun/’05 IBM/’04 Intel/’06 AMD/’05 Manufacturer/Year
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CA Lecture08 - multiprocessors and TLP (cwliu@twins.ee.nctu.edu.tw) 08-7 Other Factors Multiprocessors Growth in data-intensive applications Data bases, file servers, Growing interest in servers, server performance. Increasing desktop performance less important Improved understanding in how to use multiprocessors effectively Especially server where significant natural TLP Advantage of leveraging design investment by replication Rather than unique design
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CA Lecture08 - multiprocessors and TLP (cwliu@twins.ee.nctu.edu.tw) 08-8 Flynn s Taxonomy Flynn classified by data and control streams in 1966 SIMD Data Level Parallelism MIMD
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Lecture_08_Multiprocessors and Task-level parallelism -...

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