Lecture 02B-MIPS instructions

Lecture 02B-MIPS instructions - 1048: Computer Organization...

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Lecture02B - MIPS instructions (cwliu@twins.ee.nctu.edu.tw) 2B-1 1048: Computer Organization 1048: Computer 1048: Computer Organization Organization Lecture 2 Lecture 2 Instructions: Instructions: Language of the Computer Language of the Computer
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Lecture02B - MIPS instructions (cwliu@twins.ee.nctu.edu.tw) 2B-2 ISA Metrics Orthogonality No special registers, few special cases, all operand modes available with any data type or instruction type Completeness Support for a wide range of operations and target applications Regularity No overloading for the meanings of instruction fields Streamlined Resource needs easily determined Ease of compilation (or assembly language programming) Ease of implementation
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Lecture02B - MIPS instructions (cwliu@twins.ee.nctu.edu.tw) 2B-3 von Neumann Architecture Stored program concept Sequential execution of instructions von Neumann Budapest Hungary , 1903~1957
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Lecture02B - MIPS instructions (cwliu@twins.ee.nctu.edu.tw) 2B-4 Outline A. Instruction Set Architecture, ISA B. MIPS Instructions
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2B-5 Why MIPS Instructions? We ll be working with the MIPS instruction set architecture similar to other architectures developed since the 1980's almost 100 million MIPS processors manufactured in 2002 used by NEC, Nintendo, Cisco, Silicon Graphics, Sony, 1400 1300 1200 1100 1000 900 800 700 600 500 400 300 200 100 0 1998 2000 2001 2002 1999 Other SPARC Hitachi SH PowerPC Motorola 68K MIPS IA-32 ARM
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Lecture02B - MIPS instructions (cwliu@twins.ee.nctu.edu.tw) 2B-6 MIPS Arithmetic Each arithmetic instruction performs one operation and have 3 operands Operand order is fixed (destination first) Example: C code: a = b + c MIPS code : add a, b, c (we ll talk about registers in a bit) “The natural number of operands for an operation like addition is three… requiring every instruction to have exactly three operands, no more and no less, conforms to the philosophy of keeping the hardware simple”
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Lecture02B - MIPS instructions (cwliu@twins.ee.nctu.edu.tw) 2B-7 MIPS Arithmetic Design Principle: simplicity favors regularity . Of course this complicates some things. .. C code: a = b + c + d; MIPS code: add a, b, c add a, a, d Operands must be registers, only 32 registers provided Each register contains 32 bits Design Principle: smaller is faster . Why?
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Lecture02B - MIPS instructions (cwliu@twins.ee.nctu.edu.tw) 2B-8 Compile C into MIPS Assembly •2 C s t a t e m e n t s a = b + c; d = a – e; translated into 2 MIPS assembly instructions Î add a, b, c sub d, a, e • One-to-one mapping in this case • However, it’s not always the case…
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Lecture02B - MIPS instructions (cwliu@twins.ee.nctu.edu.tw) 2B-9 A Complex C Statement • A complex C statement f = (g + h) – (i + j); •W h a t s h o u l d a c o m p i l e r d o ? – break a C statement into several assembly instructions – introduce temporary variables translated into 3 MIPS assembly instructions Î add $t0, $s1, $s2 add $t1, $s3, $s4 sub $s0, $t0, $t1 operands are all registers !!
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Lecture02B - MIPS instructions (cwliu@twins.ee.nctu.edu.tw) 2B-10 so far … Remind you again… • Instructions are in symbolic form in assembly • What a processor knows is actually binary
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Lecture 02B-MIPS instructions - 1048: Computer Organization...

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