HW4_sol - when the instructions are all load (or store),...

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5.2 a. RegWrite = 0 All R-format, lw instruction doesn’t work b. ALUop0 = 0 BEQ doesn’t work c. ALUop1 = 0 All R-format instruction doesn’t work d. branch = 0 BEQ doesn’t work e. MemRead = 0 lw doesn’t work f. MemWrite = 0 sw doesn’t work 5.14 register available (say ri) addi ri, rs, 0 addi rs, rt, 0 addi rt, ri, 0 register not available (use mem[0]) sw rs, mem($zero) addi rs, rt, 0 lw rt, mem($zero) suppose the percentage of swap instruction is x% To complete a swap need 3 cycles (1+2x/100) * 1 >= 1*1.1 x >= 5 % 5.29 a. RegWrite = 0 All R-format, lw instructions doesn’t work b. MemRead = 0 No instruction work (can’t fetch instruction) c. MemWrite = 0 sw does not work d. IRWrite = 0 No instruction work (the fetched data can’t store) e. PCWrite = 0 Jmp doesn’t work f. PCWriteCond = 0 BEQ (when taken) doesn’t work
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5.36 Effective CPI = sum of (CPI * instruction frequency) MIPS = Effective CPI / cycle time instruction frequency M1 M2 M3 load 26% 5 4 3 store 10% 4 4 3 R-type 49% 4 3 3 Branch/jump 15% 3 3 3 Effective CPI 4.11 3.36 3 MIPS 243 952 933 According to MIPS, M2 is fastest
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Unformatted text preview: when the instructions are all load (or store), the CPI are 5, 4, 3, and the MIPS are 200, 800, 933 then M3 is fastest 5.37 instruction frequency 4.8GHz 5.6GHz 6.4GHz load 26% 5 6 7 store 10% 4 5 6 R-type 49% 4 4 5 Branch/jump 15% 3 3 4 Effective CPI 4.11 4.47 5.47 MIPS 1168 1253 1170 The performance improvement: (1253-1168) / 1168 = 7.3% from 4.8GHz to 5.6GHz Its not necessary to raise the clock rate because the CPI is reduced further. 5.38 slt $t4, $zero, $t3 beg $t4, $zero, exit cmpr: lw $t4, 0($t1) lw $t5, 0($t5) bne $t4, $t5, done addi $t3, $t3, 1 addi $t1, $t1, 4 addi $t2, $t2, 4 bne $t3, $zero, cmpr exit: addi $t1, $zero, $zero done: 5.47 instruction frequency M1 (500MHz) M2 (400 MHz) M3 (250 MHz) load 26% 5 4 3 store 10% 4 4 3 R-type 49% 4 3 3 Branch/jump 15% 3 3 3 Effective CPI 4.11 3.36 3 MIPS 121.65 119.04 83.33 M1 is fastest when all instructions are R-type, the MIPS are 125, 133, 83. then M2 is fastest...
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This note was uploaded on 08/23/2009 for the course DEE 4641 taught by Professor Cwliu during the Fall '08 term at National Chiao Tung University.

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HW4_sol - when the instructions are all load (or store),...

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