03_platform-based_design

03_platform-based_design - Platform-based Design The New...

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Unformatted text preview: Platform-based Design The New System Design Paradigm DSP e C or IE E E 13 94 e ar t ftw en So ont C Institute of Electronics, National Chiao Tung University CPU Core Glue Logic M Ha rdw are Bl ue To oth em or y Memory DSP Core I/O CPU Core IEEE1394 Driver BlueTooth RTOS BlueTooth Driver IEEE1394 I/O Block-Based Design Differentiation Software Application -Specific Hardware Platform-Based Design Orthogonalization of concerns: the separation of function and architecture, of communication and computation 1/142 Terms Institute of Electronics, National Chiao Tung University • Function – A function is an abstract view of the behavior of the system. – It is the input/output characterization of the system with respect to its environment. – It has not notion of implementation associated to it. • Architecture – An architecture is a set of components, either abstract or with a physical dimension, that is used to implement a function. • Architecture platform – A fixed set of components with some degrees if variability in the performance or dimensions of one or more of its components 2/142 Communication Institute of Electronics, National Chiao Tung University • Communication provides for the transmission of data and control information between functions and with the outside world. • Communication layers – Transaction: Point-to-point transfers between VCs. Covers the range of possible options and responses (VC interface). – Bus Transfer: Protocols used to successfully transfer data between two components across a bus. – Physical: Deal with the physical wiring of the buses, drive, and timing specific to process technology. 3/142 How Platform-Based Design Works? Reference design Derivative design Institute of Electronics, National Chiao Tung University Added Removed Modified 4/142 Multimedia Platform: MP3 Institute of Electronics, National Chiao Tung University 8-bit MCU LCD Controller DSP Audio Codec USB 1.1 On-Chip Bus Speaker Microphone Other Products Flash Card Interface 5/142 Multimedia Platform: PC Camera Institute of Electronics, National Chiao Tung University 8-bit MCU Lens Image Sensor (CMOS) Analog Processing (ADC) LCD Controller DSP Audio Codec USB 1.1 On-Chip Bus Speaker Microphone Other Products Flash Card Interface 6/142 Multimedia Platform:DSC Institute of Electronics, National Chiao Tung University 32bit MCU CCD Controller Lens Frame Transfer CCD CCD Driver Drive Timing Generator Analog Signal Processing A/D Converter AFE LCD Controller DRAM Controller Image DSP To TV Video DAC Luminance Chrominance Signal Signal Processing Processing Audio Codec Speaker Microphone NTSC/PAL Encoder USB2.0 JPEG CODEC On-Chip Bus Other Products Flash Card Interface 7/142 Multimedia Platform: Video Camera Institute of Electronics, National Chiao Tung University 32bit MCU CCD Controller Lens Frame Transfer CCD CCD Driver Drive Timing Generator Analog Signal Processing A/D Converter AFE LCD Controller DRAM Controller Image DSP To TV Video DAC Luminance Chrominance Signal Signal Processing Processing NTSC/PAL Encoder Audio Codec 1394 /USB2.0 MPEG 4 codec On-Chip Bus Speaker Microphone Other Products Flash Card Interface 8/142 Platform-based integration Institute of Electronics, National Chiao Tung University • A fully defined architecture with – Bus structure – Clocking/power distribution – OS • A collection of IP blocks • Architecture reuse The definition of a hardware platform is the result of a trade-off process involving reusability, production cost and performance optimization. 9/142 Ingredients of A Platform Institute of Electronics, National Chiao Tung University • Cores – – – – Processor IP Bus/Interconnection Peripheral IP Application specific IP • Software – – – – Drivers Firmware (Real-time) OS Application software/libraries • Validation – HW/SW Co-Verification – Compliance test suites • Prototyping – HW emulation – FPGA based prototyping – Platform prototypes (i.e. dedicated prototyping devices) – SW prototyping 10/142 How to Build A Platform Institute of Electronics, National Chiao Tung University • Architecture constraints for an integration platform: – first pick your application domain – then pick your on-chip communications architecture and structure (levels and structure of buses/private communications) – then pick your Star IP (e.g. processors) – processors ‘drag’ along detailed communications choices e.g. processor buses, – dedicated memory access, etc. - ARM-AMBA, etc. Also limit e.g. RTOS – pick application specific HW and SW IP – other IP blocks not available ‘wrapped’ to the on-chip communications may work with IP wrappers. VSI Alliance VCI is the best choice to start with for an adaptation layer 11/142 Pros & Cons of Platform-based Design Design Institute of Electronics, National Chiao Tung University • Advantages – Can substantially shorten design cycles – Large share of pre-verified components helps address the validation bottleneck for complex designs – Enables quick derivative designs once the basic platform works – Rapid prototyping systems can be used to quickly build physical prototypes and start S/W development • Limitations – Limited creativity due to predefined platform components and assembly – Differentiation more difficult to achieve, needs to be primarily in application software 12/142 Platform-summary Institute of Electronics, National Chiao Tung University • What is a platform - a shortcut to time-to-market – Object • Architecture reuse • HW/SW co-design – Accessory: tools, design and test methodologies • How to differentiate a platform – Programmability, Configurability, Scalability, Robustness – Performance, Area, Power – Application softwares • Intention – Prototyping, product 13/142 Types of Platform Institute of Electronics, National Chiao Tung University • According to the strength of constraints on hardware stronger – Fixed Platforms • Software-oriented: TI's OMAPTM, Philips Nexperia™. • Application-specific: Ericsson’s BCP, – Configurable platforms • Bus structure, multiple processor, programmable logic device • E.g.: Altera's ExcaliburTM, Triscend’s CSoC, Philips RSP, Cypress MicroSystems’ PSoCTM, E.g.: Palmchip’s PalmPakTM, Wipro’s SOC-RaPtorTM , Tality’s ARM-based SoC. – Programmable platform weaker • Improv’s - PSATM Jazz 14/142 Improv - PSATM Jazz Platform Pins Institute of Electronics, National Chiao Tung University Programmable IO Module (Parallel or serial) Custom IO Blocks P I S P I S I P Memory Memory Memory Memory Memory Memory Memory Memory Jazz Processor Jazz Processor Jazz Processor Q Bus Acronym I : Instruction P: Private: S: Shared Q Bus (Queue Bus) QBus-A Qbus-B Arb Acronym - PSA: Programmable Systems Architecture 15/142 Jazz VLIW Processor - A Sample Institute of Electronics, National Chiao Tung University Left Shared Memory Private Memory MIU MIU Right Shared Memory MIU Control Unit Data Communication Module 32 Bit ALU 32 Bit ALU 32 Bit ALU 32 Bit MAC Task Queue QBus 64 Bit Shift Jazz Processor Instruction Memory • • • • • • 3 ALUs, 1 MAC, 1 SHIFT, 1CNT (built into control unit) 240 bit instruction width (memory image lower using instruction compression) 32-bit datapath, 16-bit address width 32 deep Task Queue 1.3 BOPS at 100 MHz (5 CU ops, counter, 7 MIU ops) ~100K gates 16/142 Features Institute of Electronics, National Chiao Tung University • State-of-the-art compilation technology that supports both – Task level parallelism (with the multiple processors) – Instruction level parallelism (through the Jazz VLIW processors). • Designer start at the Java level • No OS required • Configuration at three levels – Platform - Collection of processors, data/instruction memory and I/O resource – Processor - Computation units and memory interfaces – Instruction - User can create custom logic computation units 17/142 TI's OMAPTM Platform Institute of Electronics, National Chiao Tung University • OMAP Revolutionizes: 2.5 and 3G Wireless Internet Appliances • Dual-core architecture optimized for efficient OS and multimedia code execution – TMS320C55xTM DSP provides superior multimedia performance while delivering the lowest system-level power consumption – TI-enhanced ARMTM 925 core with an added LCD frame buffer to run command and control functions and user interface applications. Acronym - OMAP: Open Multimedia Applications Platform 18/142 Philips - Rapid Silicon Prototyping (RSP) Institute of Electronics, National Chiao Tung University 19/142 RSP7 ASIC Block Diagram Institute of Electronics, National Chiao Tung University RSP7+ is targeted at customer designing SOC ASICs for: Networking Peripherals Virtual Private Networks Systems Requiring ARM-based Control and Wired Connectivity 20/142 RSP7+ Emulation Board Institute of Electronics, National Chiao Tung University 21/142 Triscend - Configurable System-on-Chip Institute of Electronics, National Chiao Tung University • A configurable system-on-chip (CSoC) is a single device consisting of: – A dedicated, industry-standard processor • 8051-based E5a • ARM-based for A7 device • SuperH for the future (2001.1.22 announced, 2002 available) – – – – An open-standard, dedicated, on-chip bus Configurable logic Memory Other system logic 22/142 Triscend E5 System Highlights Institute of Electronics, National Chiao Tung University 23/142 Triscend A7 System Highlights Institute of Electronics, National Chiao Tung University 24/142 Cypress MicroSystems - PSoCTM PSoC Blocks Institute of Electronics, National Chiao Tung University Analog PSoC Blocks Programmable Interconnect Digital PSoC Blocks Acronym - PSoC: Programmable System-on-Chip 25/142 PSoC Blocks • Eight 8-bit digital PSoC blocks Institute of Electronics, National Chiao Tung University – Four Digital Basic Type A blocks: • Timer/Counter/Shifter/CRC/PRS/Deadband functions – Four Digital Communications Type A blocks: • Timer/Counter/Shifter/CRC/PRS/Deadband functions • Full-duplex UARTs and SPI master or slave functions • Twelve analog PSoC blocks – Three types: ContinuousTime (CT) blocks, and type 1 and type 2 Switch Capacitor (SC) blocks that support – 14 bit Multi-Slope and 12 bit Delta-Sigma ADC, successive approximation ADCs up to 9 bits, DACs up to 9 bits, programmable gain stages, sample and hold circuits, programmable filters, differential comparators, and temperature sensor. 26/142 Altera - ExcaliburTM Embedded Processors Institute of Electronics, National Chiao Tung University • Processors – ARM, MIPS Embedded processor core Programmable logic core On-Chip RAM JTAG/Debug ARM/MIPS CPU APEXTM Architecture Cache External Device Serial Port External Bus Interface UART 27/142 ARM-Based System Architecture Institute of Electronics, National Chiao Tung University 28/142 Wipro’s SOC-RaPtorTM Architecture Institute of Electronics, National Chiao Tung University SOC-RaPtor: SoC Rapid Prototyper Architecture Platform 29/142 Palmchip’s PalmPakTM SoC Platform Institute of Electronics, National Chiao Tung University CoreFrameTM Architecture Mbus and PalmBus Point-to-point and broadcast connections Star-shaped topology CPU Subsystem 30/142 Tality’s ARM/OAK-based SoC Platform Institute of Electronics, National Chiao Tung University • Used as the development vehicle for multiple application-specific Integration Platforms. – for Bluetooth, xDSL and Cable Modems. – “Socketizes” the IP to make it AMBA 2.0-compliant. 31/142 Example of Tality’s Derived Design - Bluetooth Institute of Electronics, National Chiao Tung University 32/142 Summary Institute of Electronics, National Chiao Tung University • Platform-based design – From board design to SoC design – From executable spec., i.e., C/C++, to SystemC • Modeling – Performance evaluation – Task mapping – Communication refinement 33/142 ...
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This note was uploaded on 08/23/2009 for the course IEE 5016 taught by Professor Tian-sheuanchang during the Spring '05 term at National Chiao Tung University.

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