cs162_fa08_mt1-15

cs162_fa08_mt1-15 - Physical Memory table given on the next...

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CS 162 Fall 2008 Midterm Exam I October 15, 2008 Page 18/21 Problem 5c[3pts]: Consider a multi-level memory management scheme using the following format for virtual addresses: Virtual seg # (2 bits) Virtual Page # (6 bits) Offset (12 bits) Virtual addresses are translated into physical addresses of the following form: Physical Page # (8 bits) Offset (12 bits) Page table entries (PTE) are 16 bits in the following format, stored in big-endian form in memory (i.e. the MSB is first byte in memory): Physical Page # (8 bits) Kernel Nocache 0 Dirty Use Writeable Valid 1) How big is a page? Explain. 2) What is the maximum amount of virtual memory supported by this scheme? Explain 3) What is the maximum amount of physical memory supported by this scheme? Explain Problem 5d[7pts]: Assume the memory translation scheme from (5c). Use the Segment Table and
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Unformatted text preview: Physical Memory table given on the next page to predict what will happen with the following load/store instructions. Addresses are virtual. The return value for a load is an 8-bit data value or an error, while the return value for a store is either “ ok ” or an error. If there is an error, make sure to say which error. Possibilities are: “ bad segment ” (invalid segment), “ segment overflow ” (address outside range of segment), or “ access violation ” (page invalid, or attempt to write a read only page). A few answers are given: Instruction Result Instruction Result Load [0xC1015] 0x57 Store [0x52002] Store [0x43045] ok Load [0x04013] Store [0xC1016] Access violation Store [0x81015] Load [0xD2002] Store [0x03010] Store [0xD2031] Load [0x13035]...
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This note was uploaded on 08/26/2009 for the course CS 162 taught by Professor Kubiatowicz during the Spring '02 term at Berkeley.

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