7 - BME 303 Lecture 18 TRAP Routines (system calls), I/O...

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1 BME 303 Lecture 18 • TRAP Routines (system calls), I/O • Remember: Return papers with grading issues (exam #1 bonus points, HW #2 issues mentioned last time).
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7 I/O Programming Interface • How are device registers identified? – Memory-mapped : Special memory locations, accessed using normal data movement instructions – I/O mapped : Special instructions just for I/O • How is timing of transfer managed? – Synchronous : Data supplied at a fixed, predictable rate, CPU reads/writes every X cycles – Asynchronous : Data rate less predictable, so CPU must synchronize with device, so that it doesn’t miss data or write too quickly
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8 Programming Interface • Who controls transfer? (Who determines when the next data transfer occurs?) – CPU: Polling • CPU keeps checking status register until new data arrives OR device ready for next data “Are we there yet? Are we there yet? Are we there yet?” – Device: Interrupts • Device sends a special signal to CPU when new data arrives OR device ready for next data • CPU can be performing other tasks instead of polling device. “Wake me when we get there.”
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9 LC-3 I/O Bits [7:0] contain the last character typed on keyboard. Keyboard Data Register (KBDR) xFE02 Bit [15] is one when keyboard has received a new character. Keyboard Status Register (KBSR) xFE00 Character written to bits [7:0] will be displayed on screen. Display Data Register (DDR) xFE06 Bit [15] is one when device ready to display another char on screen. Display Status Register (DSR) xFE04 Function I/O Register Location • Memory-mapped I/O • Asynchronous devices (status registers) • Polling and Interrupts
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10 Keyboard Echo Routine • Usually, input character is also printed to screen. (User gets feedback on character typed and knows its ok to type the next character.) new char? read character YES NO screen ready? write character YES NO POLL1 LDI R0, KBSRPtr BRzp POLL1 LDI R0, KBDRPtr POLL2 LDI R1, DSRPtr BRzp POLL2 STI R0, DDRPtr ... KBSRPtr .FILL xFE00 KBDRPtr .FILL xFE02 DSRPtr .FILL xFE04 DDRPtr .FILL xFE06
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11 Interrupt-Driven I/O External device can: 1. Force currently executing program to stop; 2. Have the processor satisfy the device’s needs; and 3. Resume the stopped program as if nothing happened. Why? – Polling consumes a lot of cycles, especially for rare events – these cycles can be used for more computation. – Example: Process previous input while collecting current input. (See Example 8.1 in text.)
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12 Interrupt-driven I/O • To implement an interrupt mechanism, we need: – A way for the I/O device to signal the CPU that an interesting event has occurred. – A way for the CPU to test whether the interrupt signal is set – A mechanism to disable interrupts and/or to prioritize them (unimportant programs should not interrupt important ones) • Will defer further discussion of interrupts until later
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13 Understanding I/O is Not Easy Bad News; Good News • Bad News : Beyond the issues just
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This note was uploaded on 09/06/2009 for the course BME 303 taught by Professor Ren during the Spring '08 term at University of Texas at Austin.

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7 - BME 303 Lecture 18 TRAP Routines (system calls), I/O...

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