sis_lab_tutorial_1_logic_synthesis

sis_lab_tutorial_1_logic_synthesis - /RJLF RSWLPL]DWLRQ...

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Unformatted text preview: /RJLF RSWLPL]DWLRQ XVLQJ 6,6 Laboratory 1 in course Logic synthesis 2002-version Written by Tomas Bengtsson and Shashi Kumar /RJLF RSWLPLVDWLRQ XVLQJ 6,6 7RPDV %HQJWVVRQ 7RPDV %HQJWVVRQ#LQJ KM VH 6KDVKL .XPDU 6KDVKL .XPDU#LQJ KM VH- 2 - ,QWURGXFWLRQ BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB %HQFKPDUN &LUFXLWV BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB 2EMHFWLYHV BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB 'RFXPHQWV BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB /DE LQVWUXFWLRQV BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB 7DVN 'HVLJQ RI FRPELQDWLRQDO ORJLF BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB 2.1.1. Preparations ____________________________________________________6 2.1.2. Two level optimization ___________________________________________6 2.1.3. Information about BCD to 7-segment decoder _________________________6 2.1.4. Multi level optimization __________________________________________6 2.1.5. Theory about multiplier___________________________________________7 7DVN 'HVLJQ RI VHTXHQWLDO ORJLF BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB 2.2.1. Preparations ____________________________________________________8 2.2.2. Lab task _______________________________________________________8 2.2.3. Theory about the Gray-code _______________________________________9 7DVN 2SWLPL]DWLRQ RI EHQFKPDUNV BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB 2.3.1. Preparations ____________________________________________________9 2.3.2. Benchmark files_________________________________________________9 2.3.3. Two level optimization of combinatorial benchmarks ___________________9 2.3.4. Multi level optimization of combinatorial benchmarks __________________9 2.3.5. Optimization of sequential benchmarks _____________________________10 )LOH IRUPDWV IRU FRPELQDWLRQDO ORJLFBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB %/,) IRUPDW IRU FRPELQDWLRQDO ORJLF BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB 3.1.1. Example Full-adder _____________________________________________10 3.1.2. Comments in BLIF-format______________________________________11 3.1.3. The command write_blif _______________________________________12 +LHUDUFKLFDO GHVFULSWLRQV LQ %/,) IRUPDW BBBBBBBBBBBBBBBBBBBBBBBBBBB )LOH IRUPDW 3/$BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB 3.3.1. The command write_pla________________________________________15 3.3.2. pla-format for functions with dont cares ____________________________15 7KH (41 IRUPDW BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB 3.4.1. The command write_eqn _______________________________________16 )LOH IRUPDW IRU VHTXHQWLDO ORJLF BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB .,66 IRUPDW D VXESDUW RI %/,) WR GHVFULEH DQ )60 BBBBBBBBBBBBBBB 6,6 &RPPDQGV BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB +RZ WR XVH 6,6 BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB ,QSXW &RPPDQGVBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB 3URFHVVLQJ &RPPDQGV BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB /RJLF RSWLPLVDWLRQ XVLQJ 6,6...
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sis_lab_tutorial_1_logic_synthesis - /RJLF RSWLPL]DWLRQ...

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