eecs_318_7

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CWRU EECS 318 EECS 318 CAD Computer Aided Design EECS 318 CAD Computer Aided Design LECTURE 7: Multicycle CPU LECTURE 7: Multicycle CPU Instructor: Francis G. Wolff [email protected] Case Western Reserve University This presentation uses powerpoint animation: please viewshow

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CWRU EECS 318 MIPS instructions ALU alu \$rd,\$rs,\$rt \$rd = \$rs <alu> \$rt Data lw \$rt,offset(\$rs) \$rt = Mem[\$rs + offset] Transfer sw \$rt,offset(\$rs) Mem[\$rs + offset] = \$rt Branch beq \$rs,\$rt,offset \$pc = (\$rd == \$rs)? (pc+4+offset):(pc+4); Jump j address pc = address ALUi alui \$rd,\$rs,value \$rd = \$rs <alu> value
CWRU EECS 318 MIPS fixed sized instruction formats Data lw \$rt,offset(\$rs) Transfer sw \$rt,offset(\$rs) op rs rt value or offset Branch beq \$rs,\$rt,offset ALUi alui \$rt,\$rs,value I - Format op absolute address Jump j address J - Format ALU alu \$rd,\$rs,\$rt R - Format op rs rt rd shamt func

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CWRU EECS 318 Assembling Instructions op rs rt rd shamt func ALU alu \$rd ,\$rs ,\$rt 0x00400020 addu \$23 , \$0 , \$31 Suppose there are 32 registers, addu opcode=001001, addi op=001000 001001: 00000 :11111: 10111 : 00000:000000 0x00400024 addi \$17 , \$0 , 5 op rs rt value or offset ALUi alui \$rt,\$rs,value 001000: 00000 : 00101 : 0000000000000101
CWRU EECS 318 Byte Halfword Word Registers Memory Memory Word Memory Word Register Register 1. Immediate addressing 2. Register addressing 3. Base addressing 4. PC-re lative addressing 5. Pseudodirect addressing op rs rt op rs op rs op op rs Address Address Address rd . . . funct Immediate PC + + MIPS instruction formats Arithmetic addi \$rt, \$rs, value add \$rd,\$rs,\$rt Data Transfer lw \$rt,offset(\$rs) sw \$rt,offset(\$rs) Conditional branch beq \$rs,\$rt,offset Unconditional jump j address

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CWRU EECS 318 MIPS registers and conventions Name Number Conventional usage \$0 0 Constant 0 \$v0-\$v1 2-3 Expression evaluation & function return \$a0-\$a3 4-7 Arguments 1 to 4 \$t0-\$t9 8-15,24,35 Temporary (not preserved across call) \$s0-\$s7 16-23 Saved Temporary (preserved across call) \$k0-\$k1 26-27 Reserved for OS kernel \$gp 28 Pointer to global area \$sp 29 Stack pointer \$fp 30 Frame pointer \$ra 31 Return address (used by function call)
CWRU EECS 318 C function to MIPS Assembly Language int power_2(int y) { /* compute x=2^y; */ register int x, i; x=1; i=0; while(i<y) { x=x*2; i=i+1; } return x; } Assember .s Comments addi \$t0, \$0, 1 # x=1; addu \$t1, \$0, \$0 # i=0; w1: bge \$t1,\$a0,w2 # while(i<y) { /* bge= greater or equal */ addu \$t0, \$t0, \$t0 # x = x * 2; /* same as x=x+x; */ addi \$t1,\$t1,1 # i = i + 1; beq \$0,\$0,w1 # } w2: addu \$v0,\$0,\$t0 # return x; jr \$ra # jump on register ( pc = ra; ) Exit condition of a while loop is if ( i >= y ) then goto w2

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CWRU EECS 318 .text 0x00400020 addi \$8, \$0, 1 # addi\$t0, \$0, 1 0x00400024 addu \$9, \$0, \$0 # addu \$t1, \$0, \$0 0x00400028 bge \$9, \$4, 2 # bge \$t1, \$a0, w2 0x0040002c addu \$8, \$8, \$8 # addi\$t0, \$t0, \$t0 0x00400030 addi \$9, \$9, 1 # addi \$t1, \$t1, 1 0x00400034 beq \$0, \$0, -3 # beq \$0, \$0, w1 0x00400038 addu \$2, \$0, \$8 # addu \$v0, \$0, \$t0 0x0040003c jr \$31 # jr \$ra Power_2.s: MIPS storage assignment 2 words after pc fetch after bge fetch pc is 0x00400030 plus 2 words is 0x00400038 Byte address, not word address
CWRU EECS 318 Machine Language Single Stepping Values changes after the instruction!

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