eecs_318_1 - EECS 318 CAD EECS 318 CAD Computer Aided...

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EECS 318 CAD Computer Aided Design EECS 318 CAD Computer Aided Design LECTURE 1: Introduction LECTURE 1: Introduction
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CAD Design approaches Goal of each CAD design flow methodology is to increase productivity of the design engineer Increasing the abstraction level of the design methodology and tools is one approach: Abstraction Design Data Describe-synthesize Schematic Capture-simulate 1.5K - 6K 300 - 600 Gates/eng./month > 1M gates 100K - 500K gates Design Sizes
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SoC: System on a Chip The 2001 prediction: SoC’s will be > 12M gates How do you create million gate ASICs with same amount of resources? ...while Decrease development time Increase functionality and performance Keep small design teams Design Methodology (Design flow) Tools that support the Methodology IP reuse (Intellectual Property)
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ASIC and SoC Design flow
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Nand gate: behaviorial, transistor, layout Boolean Equation Mask Transistor O <= NOT ( A1 AND B1);
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Adder: behavior, netlist, transistor, layout Behavioral model Structural model
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eecs_318_1 - EECS 318 CAD EECS 318 CAD Computer Aided...

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