faq4 - comp.lang.vhdl Frequently Asked Questions And...

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comp.lang.vhdl Frequently Asked Questions And Answers (Part 4): VHDL Glossary Preliminary Remarks This part of the FAQ is reprinted from IEEE Std 1076-1993 IEEE Standard VHDL Language Reference Manual, Copyright © 1994 by the Institute of Electrical and Electronics Engineers, Inc. The IEEE disclaims any responsibility or liability resulting from the placement and use in this product. Information is reprinted with the permission of the IEEE. Further distribution is not permitted without consent of the IEEE Standards Department. This is a monthly posting to comp.lang.vhdl containing a VHDL glossary. Please send additional information directly to the editor: edwin@ds.e-technik.uni-dortmund.de (Edwin Naroska) Corrections and suggestions are appreciated. Thanks for all corrections. There are three other regular postings: part 1 lists general information on VHDL, part 2 lists books on VHDL, part 3 lists products and services (PD+commercial). The following text is reprinted from the Annex B of the IEEE Std 1076-1993 IEEE Standard VHDL Language Reference Manual. Text added by the editor of the FAQ is enclosed in square brackets . Note, the html links and the examples are not part of the original IEEE document.
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VHDL Glossary This glossary contains brief, informal descriptions for a number of terms and phrases used to define this language. The complete, formal definition of each term or phrase is provided in the main body of the standard. For each entry, the relevant clause numbers [(of the VHDL Language Reference Manual)] in the text are given. Some descriptions refer to multiple clauses in which the single concept is discussed; for these, the clause number containing the definition of the concept is given in italics. Other descriptions contain multiple clause numbers when they refer to multiple concepts; for these, none of the clause numbers are italicized. B.1 abstract literal: A literal of the universal_real abstract type or the universal_integer abstract type. (§13.2, §13.4) B.2 access type: A type that provides access to an object of a given type. Access to such an object is achieved by an access value returned by an allocator; the access value is said to designate the object. (§3, §13.3) [Example E.1] B.3 access mode: The mode in which a file object is opened, which can be either read-only or write-only. The access mode depends on the value supplied to the Open_Kind parameter. (§3.4.1, §14.3). B.4 access value: A value of an access type. This value is returned by an allocator and designates an object (which must be a variable) of a given type. A null access value designates no object. An access value can only designate an object created by an allocator; it cannot designate an object declared by an object declaration. (§3, 3.3) [Example E.1] B.5 active driver: A driver that acquires a new value during a simulation cycle regardless of whether the new value is different from the previous value. (§12.6.2, §12.6.4) B.6 actual: An expression, a port, a signal, or a variable associated with a formal port, formal
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This note was uploaded on 09/09/2009 for the course EECS 318 taught by Professor Saab during the Fall '01 term at Case Western.

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faq4 - comp.lang.vhdl Frequently Asked Questions And...

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