ECE 110 Exam Two FA2005 Solutions

ECE 110 Exam Two FA2005 Solutions - ECE 110 3/” 1L8”...

Info iconThis preview shows pages 1–8. Sign up to view the full content.

View Full Document Right Arrow Icon
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Background image of page 2
Background image of page 3

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Background image of page 4
Background image of page 5

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Background image of page 6
Background image of page 7

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Background image of page 8
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: ECE 110 3/” 1L8” Professors Brunet and Trick October 17, 2005 HOUR EXAMINATION #2 LAST Name (use capital letters): First Name (use capital letters): Signature: Circle your section: AL1(3pm)-Trick BL1(1pm)-Brunet DO NOT TURN THIS PAGE UNTIL YOU ARE TOLD A. Write or print clearly. Answer each problem on the exam itself. If you need extra paper, there is an extra sheet at the end of this exam. Clearly identify the problem number on any additionalpages. The Boolean Algebra identities are also given at the end of the exam. B. In order to receive partial or full credit, you must show all your work, e.g., your solution process, the equation(s) that you use, the values of the variables used in the equation(s), etc. You must also include the unit of measurement in each answer. Students caught cheating on this exam will earn a grade of F for the entire course. Other penalties may include suspension and/or dismissal from the university. Problem 1 (20 points) At least one of the four circuits below is the following waveform rectifier: the output waveform Vout is the negative portion of the input waveform Vin (i.e., Vow: Vin when Vin < 0, Vout= 0 when Vin > 0). State which circuit it is and explain why, using the ideal diode model (V on = 0): (‘1‘) You must draw the linear circuit for each assumption, completely analyze the circuit, and validate each assumption made. NOTE: If you start with the wrong circuit, start analyzing it, and show it does not work While following directions (at), you will receive some partial credit. R (d) R (a) I > + (b) + (c) ‘ + + Vin an Vout Vin v Vout Vin Vout Vin A Vout o The circuit is - [:1 (a) I] (b) (C) [El ((1) , Mfioflowfi)” W When the diode is on: ‘ firm: . r analyze: validate: ( § \ + z : "Vin/[Z L 20 OIL/{S wine—n e trout __ ~ z _ v.0 —' t K (‘yL -- O Summag: when Vm .... Vent ...... .. When the diode is off: m: analyze: validate: [2 O"E . 0-40 onla 40V "r'l‘ + ‘l‘ _ 014 :0l/ E Von? % ' > U—[yl > O - : - UEVI Summag: when Vin .... .... .., V0“; Problem 2 (20 points) For the given BJT' inverter circuit 25 k9 Vi 9 6V ‘3 = 50, VBEON = 0.7 V, Vegan: 0.2 V (a) assume that the transistor is operating in the active region and write the KVL' equations for the input and output loops. Find the function V0 = f(Vi) in terms of the circuit and tran51stor ' parameters. 1 v— 566 04: El“ 0 '1’ ': 5-0.1], 522/4587?" — . v = av— 542:2. (SOIL) vo=¢v—§Lsugs—o) [Va-0.71;) . 0 v\__0'7y _ oZS’E-V. W (b) If Vi = l + 0.4 sin cot, use the result in Part (a) to find Vo(t). V0 = /BV- w (/+0.slsanwz—) No 11C: {ramse‘szé/ a c {TA/E 79% 0.2 i V i (0V 0 Problem 2 (continued) I (c) If your result in Part (b) is not a good approximation to the actual output voltage in the given BJT inverter circuit, sketch a better approximation of the output waveform over one period below. ' V00) 10 oN-AChOO" Problem 3 (I Opoints) , Complete the truth table for the given CMOS circuit. A high voltage represents a logic “1,” and a low voltage a logic “0.” A 0 0 0 0 l l l 1 ’1 §0V each incorrec‘é 2.21% CS “6" a“; F inVerfed Problem 4 (I Opoints) Implement the exclusive NOR gate below using only NAND gates. Problem 5 (20 points) Consider the Boolean function F given by the truth table below: (a) (4 pts.) Write the canonical sum of product expression for F. F(X,Y,z)= {rid—X7211; x72 (1)) (16pts.) You must chooSe an optimized circuit for F. For each circuit below explain why you would choose it or not. Wn'te neatly! ' {.2 gauges f cenxcc‘l-c‘eng F4 ‘ a? 3 341‘ €$ of‘éutm/ éui 7 couxeci‘c‘l Problem 6 (20 points) For each question below, check the one most correct answer. 1) The “sum” output of a full adder can be implemented using NAND gates only. E] always [I sometimes [:1 never 2) The “carry” output of a half adder can be implemented using NAND gates only. IX] always I] sometimes [I never 3) A half adder can be implemented using a fill adder. always E] sometimes ' [I never 4) A full adder can be implemented using half adders and" few gates. always I] sometimes D never 5) With 8 bits it is possible to represent: [3 8 numbers Z] 256 numbers [I 3 numbers [:I 24 numbers 6) The largest decimal number that can be represented using 3 hexadecimal digits is: [:13x16—1 [13‘6—1 163—1 [123“6—1 7) To display the decimal value of one hexadecimal digit we need: ( [:I one E two E] four E] sixteen ) 7—segment displays 8) A 7-segment display can be used to display (check all that apply): [I some decimal digits E some letters g all decimal digits I] all letters ...
View Full Document

This note was uploaded on 09/16/2009 for the course ECE 110 taught by Professor Haken during the Spring '08 term at University of Illinois at Urbana–Champaign.

Page1 / 8

ECE 110 Exam Two FA2005 Solutions - ECE 110 3/” 1L8”...

This preview shows document pages 1 - 8. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online