cse331-week5 - CSE 331 Computer Organization and Design...

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CSE331 W05.1 Irwin Fall 2007 PSU CSE 331 Computer Organization and Design Fall 2007 Week 5 Section 1: Mary Jane Irwin ( www.cse.psu.edu/~mji ) Section 2: Krishna Narayanan Course material on ANGEL: cms.psu.edu [ adapted from D. Patterson slides ]
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CSE331 W05.2 Irwin Fall 2007 PSU Head’s Up Last week’s material Supporting procedure calls and returns This week’s material Addressing modes; Assemblers, linkers and loaders - Reading assignment - PH: 2.10, A.1-A.5 Next week’s material (after Exam #1) Introduction to VHDL and basic VHDL constructs - Reading assignment – Y, Chapters 1 through 3 Reminders HW 4 is due Thursday, Sept 27 th (by 11:55pm) Quiz 3 will close Sunday, Sept 30 th (at 11:55pm) Exam #1 is Tuesday, Oct 2, 6:30 to 7:45pm, 113 IST
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CSE331 W05.3 Irwin Fall 2007 PSU CDT Article on IBM’s BlueGene/P (9/25/07) Calculations per second Gigaflop 1 billion (1,000,000,000) Teraflop 1 trillion (1,000,000,000,000) Petaflop 1 quadrillion (1,000,000,000,000,000) Exaflop 1 quintrillion (1,000,000,000,000,000,000) Year Performance Maker 1993 16,000,000,000 Thinking Machine C-5 1994 236,000,000,000 Fujitsu Numerical Wind Tunnel 1996 368,000,000,000 Hitachi CP-PACS 1997 1,800,000,000,000 intel ASCI Red 2000 12,300,000,000,000 IBM ASCI White 2002 36,000,000,000,000 NEC Earth Simulator 2004 280,000,000,000,000 IBM BlueGene/L 2008 1,000,000,000,000,000 IBM BlueGene/P 2011 10,000,000,000,000,000 IBM BlueGene/P+ 2017 20,000,000,000,000,000 IBM BlueGene/P++ 202? 1,000,000,000,000,000,000 TBD
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CSE331 W05.4 Irwin Fall 2007 PSU MIPS Operand Addressing Modes Summary Register addressing – operand is in a register Base (displacement) addressing – operand’s address in memory is the sum of a register and a 16-bit constant contained within the instruction Immediate addressing – operand is a 16-bit constant contained within the instruction 1. Register addressing op rs rt rd funct Register word operand op rs rt offset 2. Base addressing base register Memory word or byte operand 3. Immediate addressing op rs rt operand
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CSE331 W05.5 Irwin Fall 2007 PSU MIPS Instruction Addressing Modes Summary PC-relative addressing – instruction’s address in memory is the sum of the PC and a 16-bit constant contained within the instruction Pseudo-direct addressing – instruction’s address in memory is the 26-bit constant contained within the instruction concatenated with the upper 4 bits of the PC 4. PC-relative addressing op rs rt offset Program Counter (PC) Memory branch destination instruction 5. Pseudo-direct addressing op jump address Program Counter (PC) Memory jump destination instruction ||
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CSE331 W05.6 Irwin Fall 2007 PSU Review: MIPS Instructions, so far Category Instr OpC Example Meaning Arithmetic (R & I format) add add $s1, $s2, $s3 $s1 = $s2 + $s3 subtract sub $s1, $s2, $s3 $s1 = $s2 - $s3 add immediate 8 addi $s1, $s2, 4 $s1 = $s2 + 4 shift left logical sll
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This note was uploaded on 09/23/2009 for the course CMPEN 331 taught by Professor Bhat during the Fall '08 term at Pennsylvania State University, University Park.

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cse331-week5 - CSE 331 Computer Organization and Design...

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