L02-Modes - 1/10/2008 1 Winter 2008 Winter 2008 EE 663:...

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Unformatted text preview: 1/10/2008 1 Winter 2008 Winter 2008 EE 663: Architecture of Parallel Computers EE 663: Architecture of Parallel Computers Lecture 2: Modes of Parallelism Lecture 2: Modes of Parallelism Avinash Kodi Avinash Kodi Department of Electrical Engineering & Computer Science Ohio University, Athens, Ohio 45701 E-mail: kodi@ohio.edu Website: http://ace.cs.ohio.edu/~avinashk/classes/ee663/ee663.htm Roadmap Roadmap y Parallelism Evolution Towards Parallel Systems Modes of Parallelism y Flynns Classification SISD, SIMD, MISD, MIMD DataFlow, and Demand-driven Computing 1/10/2008 2 Evolution Towards Parallel Systems Evolution Towards Parallel Systems y Two fundamental factors limit the speed of uniprocessor architectures CPU Memory I/O The execution rate of the processor The speed at which information is exchanged between the main memory and the CPU Evolution Towards Parallel Systems Evolution Towards Parallel Systems y Possible Solutions (1) : the rate of execution can be increased by Overlapping the execution of an instruction with fetching of the next instruction (Pipelining) Optimal use of the instruction set (RISC) By reducing the clock period (Technology) Combination of pipelining and code optimization techniques (Superscalar, Superpipeling) y Possible Solution (2): ways of increasing the rate of information exchange between the CPU and the main memory Increasing the number of channels on which data can be accessed simultaneously (Memory Interleaving) By using single and multi-stage caches (Increasing locality) 1/10/2008 3 Evolution Towards Parallel Systems Evolution Towards Parallel Systems y All these techniques have been used exhaustively, but we still need more computational power for varied applications...
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This note was uploaded on 09/24/2009 for the course CS 525 taught by Professor Rjyosy during the Winter '09 term at Central Mich..

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L02-Modes - 1/10/2008 1 Winter 2008 Winter 2008 EE 663:...

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