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Unformatted text preview: Midterm Sample Exam Problem 1: Consider the following logic circuit. The equivalent resistances of NMOS and PMOS transistors for W/L=1 are 13Kohm and 31Kohm, respectively. Find the average propagation delay, assuming that all the inputs (A, B and C) are switched exactly at the same time (ignore body effect). Problem 2: What is the logic function of circuits A and B. Which one is a complementary CMOS logic (dual network) and which one is not. Is the non-dual network still a valid static logic gate? Explain. Vout VDD B A C L =10fF C C internal node =2fF W/L=4 W/L=4 W/L=2 W/L=2 Vout VDD B A C L =10fF C C internal node =2fF W/L=4 W/L=4 W/L=2 W/L=2 F VDD A A B B B A B A Circuit A VDD A A B B B A B A Circuit B F F VDD A A B B B A B A Circuit A VDD A A B B B A B A Circuit A VDD A A B B B A B A Circuit B VDD A A B B B A B A Circuit B F Midterm Sample Exam Problem 3: Consider the following Circuit. (W/L) M1 is (0.5 μ m/0.25 μ m)....
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