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syll_4560 - Week 6-7 Chapter 6(Combinational logic Week 8...

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456 Syllabus, Spring 2009 Course: EE 456, Digital Integrated Circuits Analysis and Design Instructor: Prof. Saeed Mohammadi Office: Birck 2264, email: [email protected] , Tel: 494-3557, Office hours: Tue. 4:30-6:00pm in EE326A, Thur. 8:30-9:30am in BRK226, Note: My office door is always open. Call / email to make sure I am there. Textbook: Digital Integrated Circuits, A design Perspective, 2 nd edition, J.M. Rabaey, A. Chandrakasan, B. Nikolic, Prentice Hall + Instructor’s notes available on Blackboard Vista Schedule: T/R 3:00pm – 4:15pm, EE224 TA: Kerem Camsari, email: [email protected] Office hours: Wed. 5:00-7:00pm location to be determined. Week 1-2: Chapter 1, 2, 3 (Review of technology and devices) Week 3: Chapter 4 (Interconnect) Week 4-5: Chapter 5 (Inverter)
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Unformatted text preview: Week 6-7: Chapter 6 (Combinational logic) Week 8: Review, Midterm 1 Week 9: Chapter 7 (Sequential Logic) Week 10: Chapter 8 (Circuit Implementation) Week 11: Chapter 9 (Interconnect – again!) Week 12: Chapter 10 (Timing issues) Week 13: Chapter 11 (Designing Arithmetic Building Blocks) Week 14: Review, Midterm 2 Week 15: Chapter 12 (Memory and Array Structures) Week 16: Review, Final Exam Simulation: Cadence Design tool: Grading: Homework and Projects (10 assignments) 30% Midterm × 2 40% Final 30% Note: * No make up exam will be scheduled. *To pass the course, both your total grade and your final exam grade must be a pass. *An A-4 sheet of formula etc. is allowed for midterms and final exams....
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