Unformatted text preview: Week 6-7: Chapter 6 (Combinational logic) Week 8: Review, Midterm 1 Week 9: Chapter 7 (Sequential Logic) Week 10: Chapter 8 (Circuit Implementation) Week 11: Chapter 9 (Interconnect – again!) Week 12: Chapter 10 (Timing issues) Week 13: Chapter 11 (Designing Arithmetic Building Blocks) Week 14: Review, Midterm 2 Week 15: Chapter 12 (Memory and Array Structures) Week 16: Review, Final Exam Simulation: Cadence Design tool: Grading: Homework and Projects (10 assignments) 30% Midterm × 2 40% Final 30% Note: * No make up exam will be scheduled. *To pass the course, both your total grade and your final exam grade must be a pass. *An A-4 sheet of formula etc. is allowed for midterms and final exams....
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- Spring '09
- Integrated Circuit, School terminology, Digital Integrated Circuits, Integrated Circuits Analysis, Saeed Mohammadi Office