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Chapter7 - Chapter 7 Implementing Strategies for Digital...

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102 Chapter 7. Implementing Strategies for Digital ICs In this chapter, we will review various techniques for digital IC implementation. The following chart shows a summary of all these techniques. Semi-custom Design Flow 1. Design capture using hardware description language (HDL) such as VHDL, Verilog, System C 2. Logic Synthesis, module described by HDL 3. Pre-layout Simulation and verification ( performance analysis based on estimated parasitics ) 4. Floor Planning barb2right is done based on estimated module sizes 5. Placement barb2right precise position of the cells is decided 6. Routing barb2right interconnects between blocks 7. Extraction barb2right model of the chip based on layout ( device size, parasitics, capacitors and resistors ) 8. Post layout simulation and verification 9. tape out Dig. Implementation Semi Custom Custom Cell based Array based Standard Cell / Compiled Cell Macro Cell Pre-Diffused (Gate Arrays) Pre-Wired FPGA s Takes advantage of some pre- designed modules (shortens the implementation cycle) Block such as INV, AND/NAND, OR/NOR, XOR.XNOR, MUX, ADDER comparator, counter are hand designed (lay-out) Automatically cell placement and routing using standard cells Custom design of a function
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