Chapter8

Chapter8 - Chapter 8. Coping with Interconnect Capacitive...

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107 Chapter 8. Coping with Interconnect Capacitive Crosstalk b Capacitive crosstalk is an important issue for high impedance nodes. These nodes are often found in dynamic logics, pass transistor and transmission gate logics. Consider the following circuit: Vx Cxy Cy Cxy Vy Δ + = Δ Usually line y is driven with a finite resistance R. In this case: In this case rise/fall times of the interfering signal are important and you want slow rise/fall times for minimum crosstalk. Vx Cxy Cy X Y Cxy Cy X Y R tr = 5psec tr = 100psec tr = 200psec tr = 500psec>>RCy b time constant of the line Vy Due to cross talk t (nsec )
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108 So if maximum speed is not required, rise time and fall time can be increased to decrease the effect of cross-talk Higher rise/fall times b Reduced cross talk b Higher power consumption (due to direct path) Design techniques to reduce cross-talk 1. avoid floating nodes 2. separate high impedance nodes from full-swing signals (Use Gnd lines or wide gaps between the two lines) 3. increase rise/fall times subject to timing constant and direct path power. 4. use differential signaling in sensitive low-swing wiring network b In this casecross-talk is common signal and will be rejected 5. do not allow high capacitance between two signal wires. (layout technique: have the wires run on different metallization, same as item 2) 6. provide shielding wire (GND,V DD ) between two signal lines (same as item 2). Effect of cross-talk on the performance Cross-talk affects the timing performance of the circuit. Example In the following circuit, assume the incoming signals to inverters X, Y and Z arrive exactly at the same time. Worst case: signal at Y is at opposite phase with those of X and Z. b Due to miller effect, the capacitance seen by point Y is calculated as the following. X Y Z Cc Cc C GND
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109 C L = C GND +2C c +2C c = C GND +4C c worst case If X,Y and Z are stationary or for input signals with the same phase coming at the same time C L = C GND best case In general C L depends on the sequence of incoming signals. The boundaries of C L are found from the two examples above (worst case and best case). b
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Chapter8 - Chapter 8. Coping with Interconnect Capacitive...

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