HW2 - EE456 HW2 Due Date: Jan 29th EE456 HW2 Problem 1. The...

This preview shows pages 1–2. Sign up to view the full content.

EE456 HW2 Due Date: Jan 29 th 1 EE456 HW2 Problem 1. The circuit in Figure 1, Vs = 3.3 V. Assume A D = 12 μ m2, φ 0 = 0.65V, and m = 0.5. N A = 2.5 E16 and N D = 5 E15. a. Find I D and V D . b. Is the diode forward- or reverse-biased? c. Find the depletion region width, Wj , of the diode. d. Use the parallel-plate model to find the junction capacitance, Cj . e. Set Vs = 1.5 V. Again using the parallel-plate model, explain qualitatively why Cj increases. Figure 1. Series diode circuit Problem 2. Given Table 1, the goal is to derive the important device parameters from these data points. As the measured transistor is processed in a deep-submicron technology, the ‘ unified model ’ holds. From the material constants, we also could determine that the saturation voltage V DSAT equals -1V. You may also assume that -2 φ F = -0.6V. a. Is the measured transistor a PMOS or an NMOS device? Explain your answer. b.

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document
This is the end of the preview. Sign up to access the rest of the document.

This note was uploaded on 09/24/2009 for the course ECE 456 taught by Professor Mohammadi during the Spring '09 term at Purdue University-West Lafayette.

Page1 / 2

HW2 - EE456 HW2 Due Date: Jan 29th EE456 HW2 Problem 1. The...

This preview shows document pages 1 - 2. Sign up to view the full document.

View Full Document
Ask a homework question - tutors are online