HW4 - EE456 HW4 Due date: Feb. 12th EE456 HW4 Problem 1-1....

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EE456 HW4 Due date: Feb. 12 th 1 EE456 HW4 Problem 1-1. Using HSPICE of CADENCE plot the I-V characteristics for the following devices. When simulating NMOS use the range of V DS from 0V to 2.5V in step of 0.01V and the range of V GS from 0V to 2.5V in step of 0.5V. When simulating PMOS use the range of V DS from –2.5V to 0V in step of 0.01V and the range of V GS from –2.5V to 0V in step of 0.5V. Figure P1. NMOS and PMOS devices. a. NMOS W = 1.2μm, L = 0.3μm b. NMOS W = 4.8μm, L = 0.6μm c. PMOS W = 1.2 μm, L = 0.3 μm d. PMOS W = 4.8 μm, L = 0.6 μm Problem 1-2. Indicate on the plots from problem 1-1. a. the regions of operation. b. Comment on the effects of channel length modulation as observed in the plots. c. Which of the devices are in velocity saturation ? Explain how this can be observed on the IV plots. Hints for Cadence: In order to plot the I-V characteristics using HSPICE of CADENCE, use DC analysis. It will be better to use the ‘vdc’ symbol in the library of ‘analogLib’ instead of ‘input pin’ and ‘stimulus’ in
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This note was uploaded on 09/24/2009 for the course ECE 456 taught by Professor Mohammadi during the Spring '09 term at Purdue University-West Lafayette.

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HW4 - EE456 HW4 Due date: Feb. 12th EE456 HW4 Problem 1-1....

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