HW9 - technology and pushing the limits for higher...

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EE456 HW9 Due: April 9 th 2009 ECE456 HW9 Note: This HW has double the weight of a standard HW. Problem 1– In this homework you will be designing a 4-bit shift register for an on-chip network interface which is capable of serial-in/parallel-out and parallel-in/parallel-out operations based on a ‘select’ signal that is being specified as an input. The ‘select’ operation must be asynchronous so that the select signal could be specified as an extra input. We require that you encode ‘select’ such that select = ‘1’ corresponds to parallel-in and ‘select’= ‘0’ to serial-in. You are expected to design the shift register with the minimum complexity possible since the specifications for this application do not require a universal shift register. Therefore your design must be capable of doing only what is required and must not be a ‘specific function’ of a more complicated design. Your design should operate at least at 100 MHz using TSMC 0.30u
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Unformatted text preview: technology and pushing the limits for higher performance is encouraged. You can assume that rise and fall times of the CLK signal is 0.1 ns each. You can use a separate serial-input port, but this is not necessary, you could simply feed the serial input from the LSB of your data, i.e., D1 could be the Serial_Input signal. a-) Include a block diagram of your design and describe its operation and your solution strategy. b-) Describe what type of storage element (FF) you are planning to use and why. c-) To prove functionality, apply the following input signals to your design and plot the resulting waveforms. Clearly illustrate the outputs to show that your design is functional. For serial operations show the complete waveforms. (A is the MSB --- Pay attention to the input order for the serial input function). Select/ ABCD 1 1111 1 1011 1 0000 0 1101 0 1000 0 0101...
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