HW10-AdderPaper2 - A Family of Adders Simon Knowles Element...

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A Family of Adders Simon Knowles Element 14, Aztec Centre, Bristol, UK sknowles@e-14.com Abstract Binary carry-propagating addition can be efficiently expressed as a prefix computation. Several examples of adders based on such a formulation have been published, and efficient implementations are numerous. Chief among the known constructions are those of Kogge & Stone and Ladner & Fischer. In this work we show that these are end cases of a large family of addition structures, all of which share the attractive property of minimum logical depth. The intermediate structures allow trade-offs between the amount of internal wiring and the fanout of intermediate nodes, and can thus usually achieve a more attractive combination of speed and area/power cost than either of the known end-cases. Rules for the construction of such adders are given, as are examples of realistic 32b designs implemented in an industrial 0u25 CMOS process. 1. Introduction There are many ways of formulating the process of binary addition. Each different way provides different insight and thus suggests different implementations. Examples are Weinberger & Smith’s carry-lookahead adder [Wein58], Nadler’s pyramid adder [Nadl56], Sklansky’s conditional sum adder [Skla60], Bedrij’s carry-select adder [Bedr62], and Ladner & Fischer’s prefix adder [Ladn80]. For a general introduction see [Omon94]. The prefix formulation is particularly attractive because it is easily expressed and suggests very efficient implementations, ie. adders based on this formulation can be attractively fast and compact when implemented in VLSI. This paper is organised as follows. The next section reprises the prefix formulation of addition, and introduces the key properties of associativity and idempotency which make this formulation so flexible. Section 3 covers existing variants of the prefix addition algorithm and their corresponding implementations. Then in Section 4 we introduce a new family of addition structures, all of which have minimum logical depth like Ladner & Fischer’s adder, but which express different trade-offs between area and speed. The Kogge-Stone [Kogg73] and Ladner- Fischer [Ladn80] adders are the end-cases of this family. Section 5 tabulates experimental data showing the range of performances available from the new family of adders when implemented in a modern CMOS technology. Finally Section 6 introduces some less-regular structures which might be advantageous in specific circumstances. 2. Addition as a Prefix Problem We wish to compute a sum S=A+B. We will use capital letters to represent binary words, small letters to represent bits, and subscripts to indicate arithmetic weight, increasing from 0 at the lsb. Thus c i signifies a carry into bit i, and a 4..0 signifies the 5 lsb’s of A.
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HW10-AdderPaper2 - A Family of Adders Simon Knowles Element...

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