lect20-adders.ppt - Ch 11 Adders 1 Outline Single-bit Addition half or full Carry-Ripple Adder basic or PG Carry-Skip Adder Carry-Lookahead Adder very

lect20-adders.ppt - Ch 11 Adders 1 Outline Single-bit...

This preview shows page 1 - 17 out of 43 pages.

Ch 11: Adders 1
CMOS VLSI Design 2 Outline Single-bit Addition half or full Carry-Ripple Adder basic or PG Carry-Skip Adder Carry-Lookahead Adder very popular Carry-Select Adder fast, but big Carry-Increment Adder Tree Adder
CMOS VLSI Design 3
CMOS VLSI Design Half Adder 4
CMOS VLSI Design 5
CMOS VLSI Design 6 Single-Bit Addition Half Adder Full Adder A B C out S 0 0 0 0 0 1 0 1 1 0 0 1 1 1 1 0 A B C C out S 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 A B S C out A B C S C out out S A B C A B out ( , , ) S A B C C MAJ A B C
7 PGK For a full adder, define what happens to carries (in terms of A and B) B
CMOS VLSI Design 8 Full Adder Design I Brute force implementation from eqns out ( , , ) S A B C C MAJ A B C A B C S C out MAJ A B C A B B B A C S C C C B B B A A A B C B A C B A A B C C out C A A B B
CMOS VLSI Design 9 Full Adder Design II Factor S in terms of C out S = ABC + (A + B + C)(~C out ) Critical path is usually C to C out in ripple adder S S C out A B C C out MINORITY
CMOS VLSI Design 10 Layout Clever layout circumvents usual line of diffusion Use wide transistors on critical path Eliminate output inverters
CMOS VLSI Design 11 Full Adder Design III Complementary Pass Transistor Logic (CPL) Slightly faster, but more area A C S S B B C C C B B C out C out C C C C B B B B B B B B A A A
CMOS VLSI Design 12 Dual-rail Domino Very fast: dly = 1.5*FO4 inv, vs. 2.5 for static large and power hungry Used only in some very fast multipliers C out _h A_h B_h C_h B_h A_h C out _l A_l B_l C_l B_l A_l S_h S_l A_h B_h B_h B_l A_l C_l C_h C_h
CMOS VLSI Design 13 Carry Propagate Adders N-bit adder called CPA Each sum bit depends on all previous carries How do we compute all these carries quickly? + B N...1 A N...1 S N...1 C in C out 11111 1111 +0000 0000 A 4...1 carries B 4...1 S 4...1 C in C out 00000 1111 +0000 1111 C in C out
CMOS VLSI Design 14 Carry-Ripple Adder Simplest design: cascade full adders Critical path goes from C in to C out Design full adder to have fast carry delay C in C out B 1 A 1 B 2 A 2 B 3 A 3 B 4 A 4 S 1 S 2 S 3 S 4 C 1 C 2 C 3
CMOS VLSI Design 15 Inversions Critical path passes through majority gate Built from minority + inverter Eliminate inverter and use inverting full adder C out C in B 1 A 1 B 2 A 2 B 3 A 3 B 4 A 4 S 1 S 2 S 3 S 4 C 1 C 2 C 3
CMOS VLSI Design 16 Generate / Propagate Equations often factored into G and P Generate and propagate for groups spanning i:j Base case Sum: : : : 1: : : 1: i j i k i k k j i j i k k j G G

  • Left Quote Icon

    Student Picture

  • Left Quote Icon

    Student Picture

  • Left Quote Icon

    Student Picture