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ECE270.F08.Test1.TypeA.Solution

ECE270.F08.Test1.TypeA.Solution - ECE 270 Introduction to...

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Unformatted text preview: ECE 270 Introduction to Digital System Design Fall 2008 Test 1 Type A Sep. 17, 2008, Wednesday Guidelines: 1. Do not try to cheat. Type A and B are different. Cheating on different types show clearer evidence. The instructor marks each of your desk position to cross examine any cheating. 2. If any problem does not make sense, let me know immediately. 3. Assign your time wisely proportional to the points of each problem. 4. Read the questions carefully and pay attention to special instructions. 5. Show all your work to receive full credit. 6. Total number of pages in this exam: 9 7. For any reason, if you need to assume any, it must appear in your answer. 8. Write answers such that they are legible (illegible 9 no points). Name: SELL/{T10 N Prob 1 (10 pts) Prob 2 (10 pts) Prob 3 (5 pts) Prob 4 (9 pts) Prob 5 (5 pts) Prob 6 (10 pts) Prob 7 (7 pts) Prob 8 (10 pts) Total (66 pts) ECE IUPUI Problem 1. (10 pts) (21) Draw a K-map with variable order ABC. Then, mark the following function on the K-map, minimize and find the most simplified Boolean expression using the K—map. F = Z m(0,l,3,5). (b) Write the most simplified SOP expression here. F: A'B’M/c rat (b) Draw the corresponding circuit here. Problem 2. (10 pts) For the following function given by the truth table where F is output and A, B and C are inputs and where X means don’t care, Design a two-level simplified SOP circuit using 3—cube. (Wk) ABC (a) Draw 3-cube here with variable order ABC and mark ON—set 000 (black dot) and DC~set (X). Note that in a 3-cube, A goes right, B 001 goes up, and C goes back. 010 100 101 F 1 0 O 011 X 0 0 l 110 111 1 W“ (b) S ow simplified SOP expression here F: Ag + A’B’C (0) Draw the corresponding circuit here. tits) 49% 9:13er A 9 cl Problem 3. (5 pts) Implement OR-AND-INV gate performing F = X-(Y+Z) using three pMOS and three nMOS transistors and verify if it works correctly. Use 3V for Vdd and logic high, and CV for ground and logic low. Remember that pMOS turns on when its input is logic low and nMOS turns on when its input is logic high. Problem 4. (9 pts) Simplify most the following Boolean expressions using given Boolean axioms. Note that X, Y and Z are literals. Note also that implied AND operation exists; for example XY means X-Y or X and Y. identity 1. X--0=X lD. X-l=X null 2 X+l=l 2D. X-0=O idempotency: 3 X H X = X 3D. X ' X = X involution: 4 (X’)’ : X complementarity: 5. X -- X’ = 1 5D. X - X’ = 0 commutativity: 6. X H Y = Y + X 6D. X ' Y = Y ‘ X associativity: 7 (X + Y) + Z = X + (Y + Z) 7D. (X - Y) ' Z = X - (Y - Z) distributivity: 8 X ° (Y + Z) = (X ° Y) + (X - Z) 8D. X + (Y - Z) = (X + Y) - (X + Z) uniting: 9. X'Y+X-Y’=X 9D. (X+Y)-(X+Y’)=X absorption: l0. X+X'Y=X 10D. X- (X+Y)=X ll. (X+Y’)‘Y=X-Y 11D. (X-Y’)+Y=X+Y (a)A’B+BC’+A 2: fag—r E; l’ Ba” 2 A+BCWC9 'LA—tB (b)A+A’C+A’C’D+A’BC’D’ :— fH AK 0+ C/P “l“ BC/Dl) ‘3 Ai—C-tC®+BCW7 : M c + ammo“) : {-HC‘L 9+8 l A’+B’+ A = L (C) (A3)” + A Problem 5. (5 pts) Prove or disprove the following using tmth table: xY Y2 >52 ><+z X’+Y XY+Yz+W2 (may/m XY? 000 0 00 0 f 0 0 00! o (9‘ I l l l OIO O 00 0 l O 0 Oil 0 {l l l l { \00 O 0 O 1 O O O {O( o 00 I 0 o 0 ($0100 1 l l 1 [ill l O l l l \ Problem 6. (10 pts) For the following function given by the truth table where F is output and W, X, Y and Z are inputs, (510%) WXYZ F (a) Derive a corresponding Boolean expression. ’ll\0 0000 l 23:); (I) F zw’x’r’z 1“ W’x’yz + W’XYZ/ a 0011 1 1r WXYZ + w’r’z + wx’vz/ q 0100 0 a 0101 0 + wwz + waz c, 0110 1 7 0111 1 g 1000 0 q 1001 1 [0 1010 1 ll 1011 1 [1 1100 0 {a} 1101 0 m. 1110 O [5 1111 1 (b) Draw 4—variable K-map for the given function (specify variable order, true and false sections for each variable). <5 0‘? Problem 7. (a) (5 pts) Find a canonical sum—of-product expression for the following 3-Variable function using 2 m() format. F = (X’ + Y)(X’ + Z’)(X + Y’ + Z) = <W+Y+ 2/) WWW) («+29 (WW2) 1Cfi’tY+Z’)CX¢l~\/+Z)(X'*Y’+Z/)(X’+ HEW KW +2) :: MS- . MLf a M7 ‘9 M5 M2 =fim(2,435,7> Tm, Zwm, 1,3,6) (b) (2 pts) For the following function F(X,Y,Z) = X’YZ + X’YZ’ + XY’Z Find the POS canonical form using H M() format. Problem 8. (10 pts) Answer the following questions. (a) What kind of tradeoffs do you need to consider in the design of digital circuits (systems)? 0 Speed, Area (Size), Power and Cost (b) (2 pts) What is DeMorgan’s theorem and what is it used for? 0 It’s about a transformation between ANDed and ORed-term. 0 Used to prove other theorems and to simplify Boolean expressions. 0 One form of expression is equivalent to the other form. 0 Used to find complement form. (c) (2 pts) What is “don’t care” and what is it used for? 0 It is a combination of input values that is never supposed to happen. 0 It is used to simplify given function. 0 It can be included either on-set or off—set, but not both. (d) (2 pts) What are the four types of universal logic gates? 0 NAND, NOR, Multiplexor and LUT (Look-Up Table) (6) Fill in the blank. pMOS can pass logic value _1 (high)_ well and nMOS can pass logic value _0 (low)_ well. (i) How many transistors would it be necessary to implement a 3 input NOR gate? 0 6 transistors (g) What’s good about digital? (Specify two important reasons that the instructor taught.) 0 High error immunity 0 Restoration of logic values after each gate ...
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