EEE466_L06 & 7

EEE466_L06 & 7 - Instruction Set Architecture (ISA)...

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Fri. Sept. 4 and Mon. Sept. 7, 2009 Based in part th Edition Instruction Set Architecture (ISA) b View of computer seen by assembly language programmer or compiler The ISA defines what a computer system does in response to a program and a set of data An ISA is not an implementation .. The x86 ISA embodies 8086 – Pentium and beyond – The MIPS ISA embodies R2000 – R10000 – ISA’s evolve, but all chips in the same family support the core ISA Implementation: Defines how the computer does it – The sequence of steps to complete operations – Time to execute each operation – Bookkeeping functions
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Fri. Sept. 4 and Mon. Sept. 7, 2009 Based in part th Edition Classifying ISA’s General ISA Organization Operand characteristics – How are operands stored in the CPU? How many operands are in an instruction? Memory characteristics Endianness and Alignment Instructions Addressing modes supported – how is data address specified? ALU operations – what functions are performed by atomic instructions Control operations – branch architecture Instruction encoding How do we encode instructions as a sequence of 0’s and 1’s
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Fri. Sept. 4 and Mon. Sept. 7, 2009 Based in part th Edition Accumulator Architectures b Single register, A Memory PC Op Address, M Accumulator Machine State 0 Instruction Format One explicit operand per instruction – Two “working” instruction types: op and store A A op I A A op M M A – Two addressing modes •Direct addressing: M •Immediate: I1 Attributes: – Short instructions possible – Minimal internal state; simple internal design – High memory traffic
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Fri. Sept. 4 and Mon. Sept. 7, 2009 Based in part th Edition “Typical” code for an Accumulator Machine A = (B + C) * (A - D) Load B Add C Store T Load A Sub D Mpy T Store A This was the most popular early architecture: IBM 7090, DEC PDP-8 etc.
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Fri. Sept. 4 and Mon. Sept. 7, 2009 Based in part th Edition Stack Architectures b No registers PC SP Memory Cur Inst Code TOS Stack Op Address, M Op Instruction Formats No explicit operands in the ALU instructions ; one operand in push/pop Advantages: – Short instructions possible: implicit stack references – Compiler is easy to write Disadvantages: – Code is inefficient • Fix by allowing random access to stacked values – Stack is a bottleneck • Fix with a stack-cache
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Fri. Sept. 4 and Mon. Sept. 7, 2009 Based in part th Edition “Typical” code for a Stack Machine A = (B + C) * (A - D) Push B Push C Add Push A Push D Sub Mpy Pop A Promoted in the 1960’s, had limited popularity Burroughs B5500/6500, HP3000/70, Java Virtual Machine
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Fri. Sept. 4 and Mon. Sept. 7, 2009 Based in part
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EEE466_L06 & 7 - Instruction Set Architecture (ISA)...

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