Exam1_F01 - Name: SS#: CAD of Digital VLSI Ralph...

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Name: SS#: CAD of Digital VLSI Ralph Etienne-Cummings Exam 1: Digital Systems Fundamental, Integrated Electronics and Computer Systems Fundamental (1.5 hours, Open book) September 18, 2001 Attempt all questions. Show all calculations to obtain partial credits. If you run out of time, outline how you would approach the problem. P1: (25 pts) You are to design an adder that operates on two, 2-bits numbers. (a) Construct the truth table for the adder. (5 pts) (b) Obtained the simplified expressions for the adder. (5 pts) (c) Draw the schematics of the expressions. (5 pts) (d) Convert the expressions to NAND only implementation. (5 pts) (e) Convert the expression to NOR only implementation. (5 pts) 1
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Name: SS#: 2
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SS#: P2: (25 pts) Provide an intuitive proof that the above-threshold drain-current of a MOSFET: 2 gate gate SD V L W C I Where Cgate is gate capacitance per unit area, W is the width of the transistor, L is the length of the transistor and Vgate is the gate voltage. 3
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This note was uploaded on 10/11/2009 for the course ECE 141 taught by Professor Staff during the Spring '09 term at Alabama A&M University.

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Exam1_F01 - Name: SS#: CAD of Digital VLSI Ralph...

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