4902_C2009_Lab7

4902_C2009_Lab7 - EE4902 C2009 - Lab 7 MOSFET Differential...

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1 EE4902 C2009 - Lab 7 MOSFET Differential Amplifier Resistive Load Active Load PURPOSE: The primary purpose of this lab is to measure the performance of the differential amplifier. This is an important topology for integrated applications, which can take advantage of the matching of the MOSFETs in the differential pair. Upon completion of this lab you should be able to: Recognize the differential mode and common mode behavior of the differential amplifier. Recognize the use of the current mirror as a current source for biasing the differential pair. Recognize the use of the current mirror as an active load for increasing the gain the differential pair, and obtaining a single-ended output signal. LAB 7 - PRELAB P7-1. For the circuit in Figure L7-1 on the next page, verify that choosing R B =30k gives I B 250μA, and choosing R D1 =R D2 =20k gives output DC bias levels of V O1 V O2 +2.5V.
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2 Figure L7-1. +5V 8 14 7 VDD 6 I D3 5 4 3 +5V RB 30k ! M4 (U2) I B 5 14 4 VDD 3 CD4007 Vsig FUNCTION GENERATOR 7 12 9 10 VSS VDD = +5V I D2 Vo2 I D1 Vo1 RD1 20k ! VSS = -5V VSS M3 (U2) M1 (U1) M2 (U1) RD2 20k ! CD4007 VS1
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3 LAB PROCEDURE DIFFERENTIAL AMPLIFIER L7-1. Construct the circuit shown in Figure L7-1. Although this circuit will accept differential inputs, we only have a single-ended voltage source. So, one input of the differential amplifier is grounded and the other is driven with the function generator output. Note that no special circuitry or procedures are required to set the DC bias level at the input - since the differential amplifier is biased with a current source, the input can tolerate a wide range of common mode input voltage. DC BIAS OPERATING POINT L7-2. The DC bias level at the output is determined by the DC bias current and the value of the load resistors. The current mirror should provide a bias current I D3 of about 250μA. With zero differential input, the bias current should be shared equally by M1 and M2. Resistors R D1 and R D2 are chosen to achieve a DC bias level of 2.5V at each output.
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This note was uploaded on 10/13/2009 for the course ECE 4902 taught by Professor Mcneill during the Spring '01 term at WPI.

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4902_C2009_Lab7 - EE4902 C2009 - Lab 7 MOSFET Differential...

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