4902C2009hw2

4902C2009hw2 - EE4902 C2009 HW Set 2 Due in class Friday...

This preview shows pages 1–3. Sign up to view the full content.

EE4902 C2009 HW Set 2 Due in class Friday January 30. To make life easier on the grader: Be sure your NAME and ECE MAILBOX NUMBER are prominently displayed on the upper right of what you hand in. When appropriate, indicate answers with a box or underline Work as neatly as possible You may assume T = 300K unless otherwise indicated. 1) [Resistor design] It is required to make an op-amp circuit with voltage gain = 2 using the noninverting circuit shown below. This problem concerns design of the resistor used for R 1 and R 2 . a) You are considering making the resistor out of one of the following layers: Bottom metal layer (M1) Polysilicon (POLY) P-channel drain diffusion (P+) N-well (N_W). How many squares are required in each case for a 10k resistor? Use the process parameters handed out in class; also available at http://ece.wpi.edu/~mcneill/handouts/16umParameters.pdf Ignore the effects of contact resistance. b) What length L is required if a width of W = 2.4μm is used? c) Compare the total area required for both resistors in each of the different layer options. d) Find the parasitic capacitance from the resistor material to substrate in each case. e) Given your results from (c) and (d), which layer is the best choice for a 10k resistor in IC design, and why? R 2 10k ! R 1 10k ! V in V out + -

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document
2) [Capacitor design; matching] To avoid the DC power dissipation associated with resistors, most analog IC designs use capacitive voltage dividers in the op-amp feedback. An example is the gain-of-2 circuit shown below: a) Show that the gain of the circuit is v OUT v IN = 1 + C 1 C 2 b) You are considering whether to make the capacitor plates from poly-poly2 (POLY- POLY2) or metal1-metal2 (M1-M2). From the 1.6μm process parameters, what is the available capacitance per unit area in F/μm 2 for each option? Estimate the area in μm 2 required for a value of 1pF for each option. Which choice is better, and why? c) You wisely decide that each capacitor is to be made from poly-poly2. For simplicity, the plates of the capacitor will be square (W=L) as shown. Determine the dimension required to realize the 1pF value indicated. d) Now suppose that each dimension of each capacitor is subject to independent random variation of ±0.1μm. For example, a W of 10μm could be anywhere from 10.1μm to 9.9μm. For the op-amp circuit, what are the maximum and minimum possible gains for the "worst case" combinations of W 1 , L 1 , W 2 , L 2 ?
This is the end of the preview. Sign up to access the rest of the document.

This note was uploaded on 10/13/2009 for the course ECE 4902 taught by Professor Mcneill during the Spring '01 term at WPI.

Page1 / 10

4902C2009hw2 - EE4902 C2009 HW Set 2 Due in class Friday...

This preview shows document pages 1 - 3. Sign up to view the full document.

View Full Document
Ask a homework question - tutors are online