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Unformatted text preview: Carbon nanotube field-effect inverters Xiaolei Liu, Chenglung Lee, and Chongwu Zhou a) Department of Electrical Engineering Electrophysics, University of Southern California, Los Angeles, California 90089 Jie Han NASA Ames Research Center, Moffett Field, California 94035 ~ Received 19 June 2001; accepted for publication 29 August 2001 ! This letter presents p-type metaloxidesemiconductor ~ PMOS ! and complementary metaloxide semiconductor ~ CMOS ! inverters based on single-walled carbon nanotube field-effect transistors. The device structures consist of carbon nanotubes grown via a chemical-vapor deposition method and contacted by two metallic source/drain electrodes. Electrical properties of both p-type ~ without doping ! and n-type nanotube transistors with potassium doping have been measured. By utilizing a resistor as the load for a p-type nanotube field-effect transistor, a PMOS inverter is demonstrated. Furthermore, by connecting a p-type nanotube transistor and an n-type nanotube transistor, a CMOS inverter is demonstrated. Both types of inverters exhibit nice transfer characteristics at room temperature. Our work represents one step forward toward integrated circuits based on nanoelectronic devices. 2001 American Institute of Physics. @ DOI: 10.1063/1.1417516 # The electronic properties of single-walled carbon nano- tubes ~ SWNTs ! have been extensively studied throughout the last decade. 18 Various fabrication approaches have been de- veloped to address individual single-walled carbon nano- tubes, such as depositing SWNTs from liquid suspensions onto prefabricated nanoelectrodes 4,5,8 or onto flat substrates followed by patterning electrodes. 6,7 These techniques have resulted in remarkable success in producing individual iso- lated devices such as single-electron transistors 4 6 and field- effect transistors ~ FETs ! ; 58 however, there is a lack of con- trol over the location and orientation of deposited nanotubes, and hence, producing integrated systems is almost impos- sible with these techniques. In contrast, the recently devel- oped chemical-vapor deposition ~ CVD ! technique 911 has great potential in producing integrated systems because of its control on the position and orientation of as-grown nano- tubes. Recent effort with this technique has yielded a lot of interesting devices such as chemical sensors, 12 mechanical switches, 13 and p n junctions. 14 Inspired by the above-mentioned success, we have de- cided to exploit the unique advantage of the CVD technique to demonstrate small integrated nanotube systems, i.e., logic gates. This letter reports our effort on building nanoscale inverters, a basic unit of digital circuits, by using SWNTs. A p-type metaloxidesemiconductor ~ PMOS ! inverter is demonstrated by connecting a load resistor to a p-type nano- tube FET, which consists of a CVD-grown individual single- walled nanotube with metallic source/drain electrodes and the silicon substrate backgate. Further integration of thisthe silicon substrate backgate....
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- Spring '09
- Electrical Engineering