Ge_pMOS

Ge_pMOS - 242 IEEE ELECTRON DEVICE LETTERS, VOL. 24, NO. 4,...

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242 IEEE ELECTRON DEVICE LETTERS, VOL. 24, NO. 4, APRIL 2003 Electrical Characterization of Germanium p-Channel MOSFETs H. Shang , Member, IEEE , H. Okorn-Schimdt, J. Ott, P. Kozlowski, S. Steen, E. C. Jones, H.-S. P. Wong , Fellow, IEEE , and W. Hanesch Abstract— In this letter, we report germanium (Ge) p-channel MOSFETs with a thin gate stack of Ge oxynitride and low-temper- ature oxide (LTO) on bulk Ge substrate without a silicon (Si) cap layer. The fabricated devices show 2 higher transconductance and 40 7 hole mobility enhancement over the Si control with a thermal SiO P gate dielectric, as well as the excellent subthreshold characteristics. For the first time, we demonstrate Ge MOSFETs with less than 100-mV/dec subthreshold slope. Index Terms— Germanium, germanium oxynitride, mobility, MOSFET. I. INTRODUCTION A S THE SCALING of silicon (Si) CMOS devices becomes more and more challenging, both innovative device struc- tures and new materials with high carrier mobility are needed to continue improving the device performance. Enhanced device performances have been demonstrated by using a strained Si channel grown upon a relaxed silicon germanium (SiGe) substrate, where the electron mobility is increased due to the reduced intervalley phonon scattering [1]. However, at low Ge content, only moderate increases in hole mobility could be achieved in strained Si compared to bulk Si [2]. On the other hand, with high Ge content (83%), SiGe channel high hole mobility enhancement in PMOSFETs can be realized [3]. To achieve the highest enhancement, pure Ge channel is attractive. Compared to Si, pure Ge offers 2 higher mobility for electrons and 4 higher mobility for holes. High-mobility p-channel Ge MOSFETs have recently been demonstrated in relaxed Ge with a gate dielectric of 300-A low temperature oxide(LTO) [4] and in strained Ge with a gate dielectric of 3000-A LTO [5] by using an Si cap layer on top of the Ge. With a thin Si cap, a good quality of the Si/SiO interface can be achieved, but buried channel operation results. To make surface channel devices, the gate dielectric is challenging because of the lack of a stable Ge oxide. Recently, Chui et al. reported an ultrathin ZrO for Ge [6]. Pure Ge surface channel MOSFETs had been reported with a gate dielectric of 20-nm-thick Ge oxynitride (GeON) [7]. Although mobility enhancement has been consistently demonstrated in Ge devices, so far, little has been reported on Ge MOSFET device characteristics, especially the subthreshold characteristics. In this work, we Manuscript received January 3, 2003; revised February 4, 2003. The review of this letter was arranged by Editor B. Yu. The authors are with the IBM Research Division, T. J. Watson Research
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This note was uploaded on 10/13/2009 for the course ECE 3901 taught by Professor Aboud during the Spring '09 term at WPI.

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Ge_pMOS - 242 IEEE ELECTRON DEVICE LETTERS, VOL. 24, NO. 4,...

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