Trench - 2420 IEEE TRANSACTIONS ON ELECTRON DEVICES VOL 47 NO 12 DECEMBER 2000 Modeling of High Current Density Trench Gate MOSFET K G Pani

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2420 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 47, NO. 12, DECEMBER 2000 Modeling of High Current Density Trench Gate MOSFET K. G. Pani Dharmawardana and Gehan A. J. Amaratunga , Member, IEEE Abstract— This paper presents a semianalytical model devel- oped for the ON state ( ) of trench gate MOSFETs. It incorporates a more realistic model for the inversion channel re- gion, taking the effects of doping variation, transverse, and longitu- dinal electric fields including the surface scattering, into consider- ation. Accurate modeling of the inversion channel region is of para- mount importance, especially in the case of low voltage power de- vices where the inversion channel resistance is a significant portion of the overall resistance. The carrier velocity saturation at high lon- gitudinal electric fields is also taken into account in the formulation of the model. The proposed model is supported by both numerical simulation results using MEDICI and experimental results, which are in good agreement with the results of the model. This can be a useful tool in the design of optimum devices. Index Terms— Inversion channel, mobility, modeling, MOSFET, trench gate. I. INTRODUCTION T HE TRENCH GATE MOSFET (TMOSFET) is consid- ered to be one of the most promising devices for power switching at voltages up to 100 V [1]–[3]. The basic reason for its attractiveness is that, in a multicell geometry, it allows for maximization of the gate perimeter to cell area ratio by virtue of having the inversion and accumulation channel regions placed at right angles to the surface plane. Specific on resistances below 1m cm for 50 V n-channel [4] and 30–40 V p-channel [5] devices have been reported, and with the application of ULSI technology to make submicrometer-wide trench gates, further reductions in specific on resistances are expected. In addition to the geometrical advantages of the TMOSFET structure, there are device phenomena related effects which also give it some advantages. These are mainly associated with the lack of a “JFET” region. Traditionally in a DMOSFET the dif- fused p-body regions in the n-drift region, through which the main channel current has to flow, has been viewed as giving rise to depletion pinch off of this region as in a classical JFET. Detailed studies however, show that at very high current densi- ties the depletion region in the n-drift side of the p-body/n-drift region junction can be retarded due to enhanced carrier flow from accumulation channel formed in the gate-drain overlap re- gion [6], [7]. In a TMOSFET this accumulation region is used very effectively as it is placed within the n-drift region. The ul- Manuscript received December 20, 1999; revised April 17, 2000. This work was supported by Fuji Electric Research and Development Ltd, Japan. The re- view of this paper was arranged by Editor G. Baccarani. The authors are with the Department of Engineering, University of Cam-
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This note was uploaded on 10/13/2009 for the course ECE 3901 taught by Professor Aboud during the Spring '09 term at WPI.

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Trench - 2420 IEEE TRANSACTIONS ON ELECTRON DEVICES VOL 47 NO 12 DECEMBER 2000 Modeling of High Current Density Trench Gate MOSFET K G Pani

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