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Unformatted text preview: Introduction to CMOS VLSI Design Circuit Pitfalls Circuit Pitfalls Slide 2 CMOS VLSI Design Outline Circuit Pitfalls – Detective puzzle – Given circuit and symptom, diagnose cause and recommend solution – All these pitfalls have caused failures in real chips Noise Budgets Reliability Circuit Pitfalls Slide 3 CMOS VLSI Design Bad Circuit 1 Circuit – 2:1 multiplexer Symptom – Mux works when selected D is 0 but not 1. – Or fails at low V DD . – Or fails in SFSF corner. X D0 Y D1 S S Principle: Solution: Circuit Pitfalls Slide 4 CMOS VLSI Design Bad Circuit 1 Circuit – 2:1 multiplexer Symptom – Mux works when selected D is 0 but not 1. – Or fails at low V DD . – Or fails in SFSF corner. X D0 Y D1 S S Principle: Threshold drop – X never rises above V DDV t – V t is raised by the body effect – The threshold drop is most serious as V t becomes a greater fraction of V DD . Solution: Circuit Pitfalls Slide 5 CMOS VLSI Design Bad Circuit 1 Circuit – 2:1 multiplexer Symptom – Mux works when selected D is 0 but not 1. – Or fails at low V DD . – Or fails in SFSF corner. X D0 Y D1 S S Principle: Threshold drop – X never rises above V DDV t – V t is raised by the body effect – The threshold drop is most serious as V t becomes a greater fraction of V DD . Solution: Use transmission gates, not pass transistors Circuit Pitfalls Slide 6 CMOS VLSI Design Bad Circuit 2 Circuit – Latch Symptom – Load a 0 into Q – Set φ = 0 – Eventually Q spontaneously flips to 1 Principle: Solution: D Q φ φ X Circuit Pitfalls Slide 7 CMOS VLSI Design Bad Circuit 2 Circuit – Latch Symptom – Load a 0 into Q – Set φ = 0 – Eventually Q spontaneously flips to 1 Principle: Leakage – X is a dynamic node holding value as charge on the node – Eventually subthreshold leakage may disturb charge Solution: D Q φ φ X Circuit Pitfalls Slide 8 CMOS VLSI Design Bad Circuit 2 Circuit – Latch Symptom – Load a 0 into Q – Set φ = 0 – Eventually Q spontaneously flips to 1 Principle: Leakage – X is a dynamic node holding value as charge on the node – Eventually subthreshold leakage may disturb charge Solution: Staticize node with feedback – Or periodically refresh node (requires fast clock, not practical processes with big leakage) D Q φ φ X φ φ Q D X φ φ Circuit Pitfalls Slide 9 CMOS VLSI Design Bad Circuit 3 Circuit – Domino AND gate Symptom – Precharge gate (Y=0) – Then evaluate – Eventually Y spontaneously flips to 1 Principle: Solution: 1 Y φ X Circuit Pitfalls Slide 10 CMOS VLSI Design Bad Circuit 3 Circuit – Domino AND gate Symptom – Precharge gate (Y=0) – Then evaluate – Eventually Y spontaneously flips to 1 Principle: Leakage – X is a dynamic node holding value as charge on the node – Eventually subthreshold leakage may disturb charge Solution: 1 Y φ X Circuit Pitfalls...
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 Spring '07
 AdnanAziz
 Logic gate, CMOS VLSI Design, Circuit Pitfalls

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